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Cell: joinpads1G | © Simon Moore, 1997 | |||||||||||||||
Used ByNone (top level cell) |
Subcells Used1 x chipoutsel1 x contdata16G_v1 1 x contdyndata16G_v1 1 x event_G 16 x in1to2wire_v1 3 x inv16 4 x inv3 1 x logo 2 x outctrlG 1 x padringG 2 x simplebuf |
NotesTop level cell which wires up the large blocks to themselves and to the pad ring. Note that the pad ring can easily be removed to facilitate simulation since simulation models for pads were not available. |
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