spEEDO: Energy Efficiency through Debug suppOrt

spEEDO: Energy Efficiency through Debug suppOrt

Dr David J Greaves, Prof Klaus McDonald-Maier.

University of Cambridge Computer Laboratory in Collaboration with UltraSoC Limited.


spEEDO-1 was funded by the UK TSB October 2013 - June 2014. LINK .

spEEDO-1 developed a strawman API, a white paper and a demonstrator, all of which are currently out for review.

The spEEDO-1 primary paper was presented at FDL Barcelona in September 2015. PAPER PDF. SLIDES PDF.


spEEDO-2 is being set up now: spEEDO2 - outline page .

In the follow-on project we will work with real design flows for embedded systems (both the hardware and the software parts of the SoC) to enable designers to get rapid feedback on the energy consequences of their design decisions and to facilitate the run-time support provided by spEEDO1. Relevant design decisions are partition of work over different cores, bus and cache sizes and the layout of data in DRAM. We will also explore extrapolation from instruction traces to assist with datacentre design and configuration.


  • spEEDO includes a continuation of Power estimation from TLM and very-high-level models of computation (VHLS/Prazor). TLM Power 3 Draft User Manual and Download.

  • Energy Aware Computing Framework (TSB/Univ Bristol).

  • Intel's Power Gadget.
  • END