dwc_otg_driver.h

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00001 /* ==========================================================================
00002  * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_driver.h $
00003  * $Revision: #16 $
00004  * $Date: 2009/04/03 $
00005  * $Change: 1225160 $
00006  *
00007  * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
00008  * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
00009  * otherwise expressly agreed to in writing between Synopsys and you.
00010  * 
00011  * The Software IS NOT an item of Licensed Software or Licensed Product under
00012  * any End User Software License Agreement or Agreement for Licensed Product
00013  * with Synopsys or any supplement thereto. You are permitted to use and
00014  * redistribute this Software in source and binary forms, with or without
00015  * modification, provided that redistributions of source code must retain this
00016  * notice. You may not view, use, disclose, copy or distribute this file or
00017  * any information contained herein except pursuant to this license grant from
00018  * Synopsys. If you do not agree with this notice, including the disclaimer
00019  * below, then you are not authorized to use the Software.
00020  * 
00021  * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
00022  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00023  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00024  * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
00025  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
00026  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00027  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00028  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00029  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00030  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
00031  * DAMAGE.
00032  * ========================================================================== */
00033 
00034 #ifndef __DWC_OTG_DRIVER_H__
00035 #define __DWC_OTG_DRIVER_H__
00036 
00040 #include "dwc_otg_core_if.h"
00041 
00042 /* Type declarations */
00043 struct dwc_otg_pcd;
00044 struct dwc_otg_hcd;
00045 
00046 #ifdef  PCI_INTERFACE
00047 #include <linux/pci.h>
00048 #endif
00049 
00050 
00051 
00056 typedef struct dwc_otg_device {
00058         void *base;
00059 
00060 #ifdef LM_INTERFACE
00061         struct lm_device *lmdev;
00062 #elif  PCI_INTERFACE
00063         int rsrc_start;
00064         int rsrc_len;
00065 #endif
00066 
00068         dwc_otg_core_if_t *core_if;
00069 
00071         uint32_t reg_offset;
00072 
00074         struct dwc_otg_pcd *pcd;
00075 
00077         struct dwc_otg_hcd *hcd;
00078 
00080         uint8_t common_irq_installed;
00081 
00082 } dwc_otg_device_t;
00083 
00084 /*We must clear S3C24XX_EINTPEND external interrupt register 
00085  * because after clearing in this register trigerred IRQ from 
00086  * H/W core in kernel interrupt can be occured again before OTG
00087  * handlers clear all IRQ sources of Core registers because of
00088  * timing latencies and Low Level IRQ Type.
00089  */
00090 #ifdef CONFIG_MACH_IPMATE
00091 #define  S3C2410X_CLEAR_EINTPEND()   \
00092 do { \
00093         __raw_writel(1UL << 11,S3C24XX_EINTPEND); \
00094 } while (0)
00095 #else
00096 #define  S3C2410X_CLEAR_EINTPEND()   do { } while (0)
00097 #endif
00098 
00099 #endif

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