home search a-z help
University of Cambridge Computer Laboratory
Computer Design
Computer Laboratory > Course material 2006-07 > Computer Design

Computer Design

Principal lecturer: Dr Simon Moore
Taken by: Part IB, Part II (General), Diploma

Past exam questions


The aims of this course are to introduce the hardware/software interface models and the hardware structures used in designing computers. The first seven lectures are concerned with the hardware/software interface and cover the programmer's model of the computer. The last nine lectures look at hardware implementation issues at a register transfer level.


This is a 16 lecture course primarily lectured by Simon Moore. The course is split into two parts.

Part I - The Hardware/Software Interface

The first part of this course covers the programmer's model of the computer.


  • 1 - introduction to the course and some background history
  • 2 - historic machines: EDSAC vs Manchester Mark I
  • 3 - introduction to RISC processor design and the ARM instruction set
  • 4 - ARM tools and code examples
  • 5 - operating system support + memory hierarchy & management
  • 6 - Intel x86 instruction set
  • 7 - Java Virtual Machine

Part II - Hardware Structures

The second part of this course looks at hardware implementation issues at a register transfer level.


  • 8 - memory hierarchy (caching, etc.)
  • 9 - executing instructions - an algorithmic viewpoint
  • 10 - basic processor hardware: pipelining & data paths
  • 11 - extending the ARM pipeline - including load and branch delay slots
  • 12 - internal and external communication
  • 13 & 14 - N-105 processor design
  • 15 - data-flow & comments on future directions


The lecture on 19th October was cancelled, so there will only be 15 lectures for this course

Original syllabus indicates that a MIPS processor design will be presented. This was to provide a concrete example of a Verilog implementation of a processor. For various logistical reasons it was felt that more work was needed on the MIPS design and handouts, so the N-105 processor design lectured in previous years will be presented instead to maintain the high quality of the course material.

Recommended books

  • Hennessy, J.L. & Patterson, D.A. (2002). Computer Architecture: A Quantitative Approach. Morgan Kaufmann (3rd ed.). (2nd edition, 1996, is also good)
  • Patterson, D.A. & Hennessy, J.L. (1998). Computer Organization and Design. Morgan Kaufmann (2nd ed., as an alternative to the above).

Handouts and Workshops

  • Copies of the handouts will be made available at the first lecture and subsequently from the Student Administrator in the William Gates Building. Please note that the handouts only give an outline of the course. Annotations and additional examples are given in the lectures.
  • If paper copies of the handouts are not available for some reason, the PDF notes for part 1 and part 2 are available for people in the cam.ac.uk domain.
  • Architecure workshops for Part 1B students (not taken by Diploma and Part II(gen) students)
  • Example divide code for lecture 4

Examination Information

There are three lab exercises (ECAD & Architecture workshops 4, 5 and 6) taken by Part 1Bs only. There are two Tripos questions for Part 1Bs and Diplomas this academic year.

Past exam questions:

Student Feedback

Useful Links