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ECAD and Architecture Practical Classes
ECAD and Architecture Labs are Hardware practicals designed for Part IB Computer Scientists -
Overview
These laboratory sessions will teach you about designing hardware for the tPad including a soft processor core which you will program in assembly language.
The Labs have been designed to be undertaken in conjunction with the Computer Design course for Part IB students. They require knowledge gained from this course - mostly SystemVerilog and a processor covered in the course. It is strongly recommended that you look over the Labs before attending them, since you will only have a fixed amount of time with a demonstrator present to complete the practical.
Supported by
- Prerequisite learning
- Prerequisite learning using the on-line Cambridge SystemVerilog Tutor
- SystemVerilog cheat sheet (PDF)
- Background information
- tPad
- Quartus
- Modelsim
- Qsys
- Thacker's Tiny Computer (TTC)
- Laboratory work
- Lab 1 - Introduction to synthesis and simulation
- Lab 2 - Mandlebrot set
- Assessment
- Additional information
- Troubleshooting Wiki page
- Extra info. (e.g. Bluespec)
- Tick List (access from cam.ac.uk domain only)
- Computer Architecture Lectures
- Downloads (access from cam.ac.uk domain only)