Architecting, Managing, and Programming a Reconfigurable Workstation Processor

Wouldn't it be good if you could tailor the processor in your workstation to do exactly what you wanted it to do? If your graphics application needed filter instructions, they would be there; if your encryption algorithm needed bit-munging instructions, they would be there too. Better still, what if instructions could be tailored at run time to a specific problem instance? Reconfigurable processors are devices that combine one or more microprocessor cores with an area of Field Programmable Logic (FPL). FPL allows hardware designs to be loaded onto a chip at run time, providing the flexibility to customise the hardware to suit current needs. However, so far these devices have only been designed for embedded systems work, not for use in the more dynamic and unpredictable environment of a general purpose workstation. This talk presents a high-level summary of my PhD work, which looked how to suitably structure a reconfigurable processor for a more dynamic environment, how to manage it through the OS so that the new resource is shared fairly between applications, and how to ensure it could be programmed using conventional compiler technologies.