BOS software



next up previous
Next: Pcb and PALs Up: DAN Processor Node: The Previous: Links

BOS software

The ROMs on the MDH-9 currently contain an ARM version of the BOS monitor program found on most of the previous MDH-x machines. This is written to run with only the CPU, ROM and serial line working, so may not use a stack or scratch RAM. This version was written with the aid of an assembler and eprom eraser - which is regarded as cheating by purists. The commands available are shown in table 16.

 
Table 16:   Commands in MDH-9 BOS

BOS will accept either upper or lower case ASCII, and always echos upper case. No CPU register access commands are implemented. When code is executed with the G command the return address is passed in r14, and the value returned in r4 is used as the current location.

The behaviour of the machine specific commands is:

L
This command is for testing the processor. If the CPU has a poor clock then instructions may be misexecuted. To check this the 68901 LEDs are turned on and the CPU is put into an infinite loop. If the loop terminates, as happens when a bad clock is supplied, the LEDs are turned off and control is returned to BOS. The LEDs turning off may be used to trigger the logic analyser.
T
Tests are run on the 512k of on board SRAM. Firstly ``data'' tests are performed to check that each location will store words correctly. Then the ``words'' test checks for addressing problems to ensure each location is unique, finally a similar test is performed to check with byte accesses. Should a test fail BOS is reentered with the fault location set as the current location. If these tests are passed then the cache investigation code is run, determining the quantity of cache memory and testing it.
V
The ARM exception vectors are in ROM on the MDH-9, the ROM locations are set to jump to secondary vectors in RAM at the same offset from the base of RAM as the vectors usually are. Normally BOS does not use any vectors and exceptions will not be handled, following the V command the vectors are set to print a message and restart BOS, see table 17.

 
Table 17:   Exception vectors and BOS messages

E
The ARM 600 starts up in 26 bit program and address space, and attempts to access addresses outside this range will address fault. This command enables 32 bit data accesses but leaves the core in 26 bit program mode. If neither this command nor the vector command has been given then accesses to any devices other than ROM, local SRAM and the 68901 will cause the processor to hang on an untrapped address violation.

B
The boot command runs a standalone version of Wanda Serial Line Boot. This expects an xwconsgif to be at the other end of the line. The code is loaded starting at address 0x82000 and is executed when the boot protocol succesfully terminates.

X
The extended boot command causes the cache subsystem to be investigated. If a valid cache is found then the fabric will be investigated and connection requests for localhost.memoryserver sent to all ports. When a reply is received region zero of the cache is connected to it, the MMU set so 0x00300000-0x003FFFFF maps to region zero, and code is run at 0x00300000.



next up previous
Next: Pcb and PALs Up: DAN Processor Node: The Previous: Links



Mark Hayter