Typical macroscopic performance equations: SRAM example.

It is important to model SRAM accurately. A 45nm SRAM can be modelled simply in terms of Area, Delay and Power Consumption:

Four rules of thumb (scaling formulae) for single-ported SRAM CACTI at HP labs. »Cacti RAM Models

Technology parameters:

• Read width 64 bits. Technology Size (nm):45 Vdd:1.0
• Number of banks:1 Read/Write Ports per bank:1
• Read Ports per bank:0 Write Ports per bank:0

Interpolated equations:

• Area = 13359.26+4.93/8*bits squm: gradient = 0.6 squm/bit.
• Read energy = 5 + 1.2E-4 / 8 * bits pJ.
• Leakage (static power) = 82nW per bit.
• Random access latency = 0.21 + 3.8E-4(sqrt(bits)) nanoseconds * 1.0/supply voltage.

Another rule of thumb: area is about 600 square lambda for an SRAM bit cell, where lambda is the feature size (45E-9).