Random Logic Power Consumption

Recap from the 'Power' section of this course. Power in Watts is voltage times current or energy times frequency.

The current consumed by a chip is the sum of its static current and dynamic current. Static current is generated by the leakage through off transistors. In the past, for CMOS, static current was of no consequence, but with today's small transistors it can account for one third of a SoC's power consumption.

Dynamic current use is proportional to chip activity. We can get an accurate model of dynamic power by considering :

• All energy in a net/gates is wasted each time it discharges.
• The energy in a capacitor is E = CV^2/2.
• Dominant capacitance is proportional to net length.
• Gate input and output capacitance also contribute to C.

Some additional dynamic energy is consumed as `short-circuit current' which is current that passes during switching when both the P and N transistors are on at once, but this is small and we mainly ignore it in these notes. Useful article: » POWER MANAGEMENT IN CPU DESIGN

Short-circuit current is proportional to the toggle ratio. The toggle ratio, t_tr is the percentage of clock cycles that see a transition in either direction. The net toggle rate = Operating frequency of the chip f \times t_r;

• 1 W/cm² can be dissipated from a plastic package.
• 2-4 W/cm² required a heat sink.
• more than 8 W/cm² requires forced cooling.

Workstation and laptop microprocessors dissipate tens of Watts: hence cooling fans and heat pipes.

In the past we were often core-bound or pad-bound. Today's SoC designs are commonly power-bound.