Further Synthesis Issues

There are many combinational circuits that have the same functionality.

Synthesis tools can accept additional guiding metrics from the user, that affect

• Power consumption,
• Area use,
• Performance,
• Testability.

Gate libraries have high and low drive stength forms of most gates (see later).

Some leaf cells are broadside and do not require bit-blasting.

The tool will use Quine/McCluskey, Espresso or similar for logic minimisation.

   reg[31:0] y;
   ...
   if (e1) y <= e2; 
   else if (e3) y <= e4; 
   else y <= 32'bx;              // Note, assignment of 'x' permits automated logic minimisation.

Can share sub-expressions or re-compute expressions locally.

Can re-encode state (see later).

24: (C) 2008-13, DJ Greaves, University of Cambridge, Computer Laboratory.

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