HOME       UP       PREV       NEXT (Review/Revision of Verilog RTL)  

ACS P35 SoC D/M Vacation Slide Pack (RTL)

  • Vacation Summer Pack
  • Review/Revision of Verilog RTL
  • RTL Summary View of Variant Forms.
  • Structural Verilog
  • Structure Flattening
  • 2a/3: Continuous Assignment.
  • 2b/3: Pure RTL : unordered register transfers.
  • Elementary Examples
  • 3/3: Behavioural RTL
  • SystemC Components
  • Example (Counter)
  • SystemC Structural Netlist
  • SystemC Channels and Signals
  • Threads and Methods
  • Example using an SC_THREAD
  • Blocking and Eventing
  • Transactional Handshaking
  • Transactional Handshaking in RTL (Synchronous Example)
  • Structural Hazards.
  • Structural Hazards in RTL
  • Folding, Retiming & Recoding
  • Critical Paths