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Driving a 7 Segment LED Display
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Over the next 5 practicals you will build a receiver for the
MSF
Rugby time code signals using the embedded ARM and Verilog code for
the FPGA. The Rugby signal is a radio signal, which is being
retransmitted as infra-red (IR) in the Intel Lab.
In the final practical you will build a clock using the MSF Rugby
signal that is transmitted over IR. You will decode this using the
ARM in Lab 6, but for now we must work on the other end of the
chain. In order to display the time you will use a HDSP-B03E "88:88" 7
segment display. This has the segments wired up in a matrix (see the diagram
in the datasheet), so you will need to write some Verilog to 'scan out' the
digits, drawing one digit at a time so fast that the user is tricked into
believing that all digits are on at once.
You should wire up the 4 digit 7 segment display to the General
purpose IO board. IMPORTANT: You should have a 220 Ohm
resistor on each of the wires to segments to limit the current. A
diagram of the headers on the I/O board is on the datasheet page.
Your Verilog should pull one of the digit common wires down (with
the rest high) and output the segment data on the segment wires. You should
then have a delay of about 1ms before moving onto the next digit.
The following code snippet may be useful. It takes a number
between 0 and 15 (representing a hex digit) and lights up the LEDs
needed to display that number.
// 7 segment LED display
// author pw
// assumes LED display is wired as follows (MSB first):
// dp,G,F,E,D,C,B,A
module leddisp(val, dp, disp);
input [3:0] val;
input dp;
output [7:0] disp;
assign disp[6:0] = (val == 0 ? 7'b0111111 :
val == 1 ? 7'b0000110 :
val == 2 ? 7'b1011011 :
val == 3 ? 7'b1001111 :
val == 4 ? 7'b1100110 :
val == 5 ? 7'b1101101 :
val == 6 ? 7'b1111101 :
val == 7 ? 7'b0100111 :
val == 8 ? 7'b1111111 :
val == 9 ? 7'b1101111 :
val == 10? 7'b1110111 : // a
val == 11? 7'b1111100 : // b
val == 12? 7'b1011000 : // c
val == 13? 7'b1011110 : // d
val == 14? 7'b1111001 : // e
7'b1110001 );// f
assign disp[7]=dp;
endmodule
Questions
- If each segment of the LED can draw a maximum current of x Amps,
what is the maximum current consumed by the LED module when driven by your design?
- Why doesn't the module provide a separate connection for each LED?
Ticking criteria
Ticking procedure
- Show your work to one of the demonstrators (on screen or
paper). They will award you with a tick if the work is up to
standard.
- Print out your final work and add it to your portfolio to be
submitted as instructed in the Head of Department notice.
The next practical is quite involved, so it would make your life much easier if you
have a think about it and maybe start work on it before coming to the next session.
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