NetFPGA Spring School

Build an Internet router and learn about clean-slate switches in a 5-day spring school will be held at Cambridge University

Limited Places remaining! email netfpga-2010 at for details

For those that have pregistered the eSales website is finally open, the direct link is here

If you still wish to pay by cheque in GBP rather than credit card; that option is also available - please let me know directly.

Open to: Academics teaching classes with the NetFPGA, and researchers (postdoc or graduate-student) interested in developing new hardware-accelerated network applications.

Those that have done a previous NetFPGA workshop will still gain from this course; while some parts of the first two days have been presented at past single and two-day workshops, this extended school presents considerably more material and will allow you to get the most as you learn about how to develop in the NetFPGA environment by working alongside those that have experience with the NetFPGA platform.

Location: Computer Laboratory, University of Cambridge,
Room FW11, 1st Floor,
William Gates Building, 15 JJ Thomson Ave, CB3 0FD, UK

Google Map

Dates: Monday, March 15th - Friday, March 19th, 2010, Time: 9am - 5pm. Breakfast is delivered at 8am. Punt trips and other evening events will be announced here.

View Cambridge NetFPGA Spring School 2010 event information in a larger map

Presented by: the Cambridge NetFPGA Group and friends.


An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.

By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. During the spring school, we will use the NetFPGA to determine the amount of memory needed to buffer TCP/IP data streaming through the Gigabit/second router. Hardware circuits within the NetFPGA will be implemented to measure and plot the occupancy of buffers. Circuits will be downloaded into reconfigurable hardware and tested with live, streaming Internet video traffic.


  • Day1 Slides PPT PDF
  • Openflow Session Slides PPT PDF
  • Day2 Slides PPT PDF
  • Day5 wrap-up slides PPT PDF

  • Zip bundle PPT PDF
  • Background

    Attendees will utilize a Linux-based PC equipped with NetFPGA hardware. A basic understanding of Ethernet switching and network routing is expected. Past experience with Verilog is useful but not required. This week-long spring school extends the material presented at the shorter workshop events to permit participants to fully develop a NetFPGA project.


    Background Reading

    To Attend this Event