Kiwi is a compiler and library and infrastructure for hardware accelerator synthesis and general support for high-performance scientific computing. The output is intended for execution of on FPGA or in custom silicon on ASIC.

We aim to compile a fairly broad subset of the concurrent C# language subject to some restrictions:

For Kiwi 1, the current version, we have the following aims:

In Kiwi 2 we will relax the static restrictions and allow the size of data structures in DRAM to be determined at runtime. See url

Kiwi 2, available early 2017, supports three major compilation modes. These can be mixed in a single design, at a subsystem granularity, with the new incremental compilation support based on IP-XACT.

  1. The Ssequencer major mode is `classical HLS'. It will generate a custom datapath made up of RAMs, ALUs and external DRAM connections and fold the program onto this structure using some small number of clock cycles for each iteration of the inner loops.

  2. The Fully-Pipelined Accelerator major mode will run the whole subsystem every clock tick, accepting new data every clock cycle, allbeit with some number of clock cycles latency between a particular input appearing at the output.

  3. The SoC Render major mode provides C# access to an IP-XACT-driven wiring generator with support for automatic glue logic insertion.

Download and License

Kiwi has been given to several academic institutions for early experiments. A usable release was made in early 2017 and is downloadable on completion of a web form. The web form will be on this url:

Open Source ?

Kiwi is now open source and access is granted via the same web page.


Neither the authors nor their employers warrant that the Kiwi system is correct, usable or noninfringing. It is an academic prototype. We accept no responsibility for direct or indirect loss or consequential loss to the maximum amount allowable in UK law.

David Greaves 2017-04-12