Kiwi is a compiler and library and infrastructure for hardware accelerator synthesis and general support for high-performance scientific computing. The output is intended for execution of on FPGA or in custom silicon on ASIC.

We aim to compile a fairly broad subset of the concurrent C# language subject to some restrictions:

For Kiwi 1, the current version, we have the following aims:

In Kiwi 2 we will relax the static restrictions and allow the size of data structures in DRAM to be determined at runtime. See

Kiwi 2, planned to be available in the middle of 2017, supports three major compilation modes. These can be mixed in a single design, at a subsystem granularity, with the new incremental compilation support based on IP-XACT.

  1. The Sequencer major mode is `classical HLS'. It will generate a custom datapath made up of RAMs, ALUs and external DRAM connections and folds the program onto this structure using some small number of clock cycles for each iteration of the inner loops.

  2. The Fully-Pipelined Accelerator major mode will run the whole subsystem every clock tick, accepting new data every clock cycle, allbeit with some number of clock cycles latency between a particular input appearing at the output.

  3. The SoC Render major mode provides C# access to an IP-XACT-driven wiring generator with support for automatic glue logic insertion. The invoked subsystem is called HPR System Integrator (§39). This can target multi-FPGA designs and provides a clean mechanism to wrap up third-party IP blocks, such as CAMs.

Download and License

Kiwi has been open source since early 2017 and is downloadable (perhaps on completion of a web form). The download page is


Neither the authors nor their employers warrant that the Kiwi system is correct, usable or noninfringing. It is an academic prototype. We accept no responsibility for direct or indirect loss or consequential loss to the maximum amount allowable in UK law.

David Greaves 2017-11-07