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NEXT (Interrupt Wiring: General Structure)
Memories continued.
On-chip SRAM needs test mechanism. Various approaches:
- Can test with software running on embedded processor.
- Can have a special test mode, where address and data lines become
directly controllable (JTAG or otherwise).
- Can use a built-in hardware self test (BIST) wrapper that implements 0/F/5/A and
walking ones typical tests.
Larger memories and specialised memories are normally off-chip for various reasons:
- Large area: would not be cost-effective on-chip,
- Specialised: proprietary or dense VLSI technology cannot be made on chip,
- Specialised: non-volatile process (such as FLASH)
- Commodity parts: economies of scale (ZBT SRAM, DRAM, FLASH)