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24th April, 1998: Eric C. R. Hehner
Computer Laboratory > Research > TSG > Logic and Semantics Seminar > 24th April, 1998: Eric C. R. Hehner

Speaker: Eric C. R. Hehner, University of Toronto
Title: High-Level Circuit Design
Time: 24th April, 1998, 14:00
Abstract:

(Work with Theodore S. Novell and Richard F. Paige)

We present two new ways to implement ordinary programs with logic gates. One, like imperative programs, has an associated memory to store state; the other, like functional programs, passes the state from one component to the next. Circuit design can be done more effectively by describing the function that a circuit is intended to perform than by describing a circuit that is intended to perform that function. We use a standard programming language like Pascal or CSP, not to describe circuits, but to describe algorithms. The resulting circuits are produce automatically; they behave according to the programs, and have the same structure as the programs. For timing we use local delays, rather than a global clock (synchronous) or local handshaking (asynchronous). We give a formal semantics for both programs and circuits in order to prove our programs correct. by simulation we also demonstrate that the circuits perform favourably compared to others.