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Computer Science Tripos Syllabus - ECAD
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Lecturers: Dr S.W. Moore

No. of lectures and practicals: 8 + 7

Prerequisite courses: Digital Electronics, Structured Hardware Design

This course is a prerequisite for VLSI Design (Part II).


This course aims to introduce electronic computer aided design (ECAD) with a particular emphasis on the Verilog hardware description language (HDL).

The material covered in the initial lectures is vital for the mandatory ECAD+Architecture afternoon workshops.


  • Design flows, design entry, netlists. FPGA and ASIC design flows. Schematic and text entry. Behavioural and structural models. Netlists. Concept of synthesis.

  • Verilog HDL. Verilog language with focus on a synthesisable subset of Verilog.

  • Design examples and common problems. Asynchronous inputs, debouncing, reset, common pitfalls.

  • Workshop introduction and further examples. ECAD+Architecture workshop hardware, FPGAs, clocking, further design examples.

  • Simulation, implementation technologies. Logic value and delay modelling. Discrete event and device simulation. Technologies (e.g. PLA, FPGA, ASIC).

  • Logic synthesis. Metrics, logic minimisation, finite state machines, re-timing.

  • Chip, board and system testing. Production testing, fault models, testability, fault coverage, scan path testing.

  • Future directions. Current technology, technology trends, ECAD trends, challenges.


At the end of the course students should:

  • be able to design, prototype and debug circuits using Verilog targeted at programmable gate arrays (FPGA)

  • understand circuit simulation, synthesis and testing concepts

  • appreciate the FPGA and ASIC design flow

Recommended books

The following books are recommended for reference only:

Smith, D.R. & Franzon, P.D. Verilog styles for synthesis of digital systems. Prentice Hall.
Thomas, D.E. & Moorby, P. (1995). The Verilog hardware description language. Kluwer Academic Publishers.
Sternheim, E., Singh, R., Madhaven, R. & Trivedi, Y. (1993). Digital design and synthesis with Verilog HDL. Automata.

From the Part IA Digital Electronics course:

Katz, R.H. (1994). Contemporary logic design. Benjamin/Cummings.

Pointers to sources of more specialist information are included in the lecture notes and on the associated course web page.

next up previous contents
Next: Group Project Up: Michaelmas Term 2004: Part Previous: Digital Electronics   Contents
Christine Northeast
Wed Sep 8 11:57:14 BST 2004