Untethered lowRISC tutorial

• Compile the RISC-V Linux and the ramdisk `root.bin`

• A guide to the development environment

• Behavioural Simulation (Spike)

• Bootload procedure

• Compile and install RISC-V cross-compiler

• Configuration parameters

• FPGA Demo

• FPGA Simulation

• Install Verilator

• Install Xilinx Vivado

• Memory and I/O maps, soft reset, and interrupts

• Memory mapped I/O (MMIO)

• Overview of the Rocket chip

• Release Notes

• Rocket core overview

• RTL simulation

• Simulations and FPGA Demo