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| News: The alpha version if the Interactive Verilog Tutor (IVC) is now available for trial as a revision aid. Login here
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| Acknowledgements: Many thanks to Philip Wise and Gordon
Williams for designing the IO board and much of the laboratory
material during the summer of 2003. Thanks are also due to Daniel
Gordon (Cambridge) and Prof Steve Leeb (MIT) for collaborating on the
project. To Altera for funding Philip and Gordon and providing kit at
low cost, and CMI for funding Daniel and paying for some of the
development. |
| Simon Moore |
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