Computer Design
2003-04

Aims

The aims of this course are to introduce the hardware/software interface models and the hardware structures used in designing computers. The first seven lectures are concerned with the hardware/software interface and cover the programmer's model of the computer. The last eight lectures look at hardware implementation issues at a register transfer level

Structure

This is a 16 lecture course primarily lectured by Simon Moore. There will be one guest lecture. The course is split into two parts.

Part I - The Hardware/Software Interface

The first part of this course covers the programmer's model of the computer.

Lectures:

• 1 - introduction to the course and some background history
• 2 - historic machines: EDSAC vs Manchester Mark I
• 3 - introduction to RISC processor design and the ARM instruction set
• 4 - ARM tools and code examples
• 5 - operating system support + memory hierarchy & management
• 6 - Intel x86 instruction set
• 7 - Java Virtual Machine

Part II - Hardware Structures

The second part of this course looks at hardware implementation issues at a register transfer level.

Lectures:

• 8 - executing instructions - an algorithmic viewpoint
• 9 - basic processor hardware: pipelining & data paths
• 10 - extending the ARM pipeline - including load and branch delay slots
• 11 - memory hierarchy (caching, etc.)
• 12 - buses (internal communication pathways)
• 13 - communication interfaces and devices
• 14 - control structures (state machines and microcode)
• 15 - data-flow & comments on future directions
• 16 - guest lecture TBA

Recommended books

• Hennessy, J.L. & Patterson, D.A. (1996). Computer Architecture: A Quantitative Approach. Morgan Kaufmann (2nd ed.)
• Patterson, D.A. & Hennessy, J.L. (1998). Computer Organization and Design. Morgan Kaufmann (2nd ed.).

Handouts and Workshops

• Copies of the handouts will be made available at the first lecture and subsequently from the Student Administrator in the William Gates Building. Please note that the handouts only give an outline of the course. Annotations and additional examples are given in the lectures.
• Architecure workshops for Part 1B students (not taken by Diploma and Part II(gen) students)
• Example divide code for lecture 4

Examination Information

There are three lab exercises (ECAD & Architecture workshops 4, 5 and 6) taken by Part 1Bs only. There are three Tripos questions for Part 1Bs and Diplomas.

Past exam questions:

• recent Computer Design questions
• older questions from the Processor Architecture Course which are still mostly relevant
• other example questions (in PDF format)

Student Feedback

• Make a formal comment on the course or
• E-mail an informal comment to the lecturer: Simon.Moore at the lab.

Useful Links

• a breif introduction to the ARM tools is presented in workshop 4
• EDSAC simulators
• online manuals and guides from ARM
• the GNU C compiler can be built as a cross compiler (e.g. compile ARM code on an Intel Linux box) - see gcc sources and the CrossGCC FAQ. If you're interested in this, then ARM Linux might also interest you. There is also an embedded OS from RedHat called eCos which will fit on an AEB.
• Intel architecture manuals
• Java VM Specification
• CPU Info Center
• Computer Histroy museum
• Virtual museum of computing

Errata

Lecture 6 - The URL for Intel IA-32 documentation is now:

• Volume 1: http://developer.intel.com/design/pentium4/manuals/245470.htm
• Volume 2: http://developer.intel.com/design/pentium4/manuals/245471.htm
• Volume 3: http://developer.intel.com/design/pentium4/manuals/245472.htm