HOME       UP       PREV       FURTHER NOTES       NEXT (RAM Macrocell Compiler Tool)  

Static Timing Analyser Tool

A static timing analyser computes the longest event path through logic gates and clock-to-Q paths of edge-triggered flops.

The longest path is generally the critical path that sets the maximum clock frequency. However, sometimes this is a false result, since this path might never be used during device operation.

(C) 2008-10, DJ Greaves, University of Cambridge, Computer Laboratory.