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Delay Estimation Formula.

Logic net with tracking and input load capacitances illustrated.
Capacitive loading of a gate:

Total gate delay is then:

   device delay = (intrinsic delay) + (output load \times derating factor).

The track-dependent output loading is a library constant times the track area.

The load-dependent part is the sum of the input loads of all of the devices being fed.

For short, non-clock nets (less than 0.1 wavelength), include propagation delay in the gate derating and assume the signal arrives at all points simultaneously.

Only know track length post layout. Pre-layout and pre-synthesis we need RTL-level heuristics.

(C) 2008-10, DJ Greaves, University of Cambridge, Computer Laboratory.