This creates a suitable file to be downloaded to the XTB and downloads it and the emulator. Here it is:
#! /usr/bin/perl # # ramprom - 'creates' a prom using a xilinx teaching board # # This script: # Converts .mcs to .xil # Converts .xil to .dat (replaces M with K & N with W) # Appends the .dat file to rammerout.xil (the prom emulator) # Downloads the result to XTB on specified host & port # $Syntax= <<end; RAMPROM - Serial prom emulator for the Xilinx Teaching Board Syntax: ramprom -h host [-s service] [-p port] <mcs_file_without_extension> The default is -s telnet. end $servport = "telnet"; # process switches while ($_ = $ARGV[0], /^-/ ) { shift; last if /^--/; if (/^-h/) { $host = $ARGV[0]; shift; } if (/^-s/) { $servport = $ARGV[0]; shift; } if (/^-p/) { $servport = $ARGV[0]; shift; } } if (!$ARGV[0]) { print STDERR $Syntax; exit(1); } if (!$host) { print STDERR "$Syntax\n*** Please add host name using -h option.\n"; exit(1); } # Where is the makefile? $mf="/usr/groups/fairisle/ramprom/promMakefile"; # Where is xidump? $xidump="/usr/groups/fairisle/ramprom/xidump"; # Produce needed files system("make -f $mf CHIP=$ARGV[0]"); # and send result to XTB. print "Sending to $host...\n"; system("$xidump $host $servport < $ARGV[0].prm"); print "done\n";
To use the script, create a .mcs version of your PROM data using the standard tools (makebits & makeprom). Most makefiles will do this for you. Plug the XTB into the socket where the PROM would go. Then, supposing that your output is freddyout.mcs and that the teaching board is connected to the telnet port of grosvenor8-r, run ramprom -h grosvenor8-r freddyout. That's it.
This will:
Strictly speaking, there is no need for rammerout.xil to be downloaded each time. Once the emulator is there, it stays there, but this is simpler.
RAMPROM can be used for proms which initialise daisy-chained Xilinx chips, provided that the memory on the XTB is sufficient. For simplicity's sake, the current version of the emulator just uses the bottom byte of each memory word for storage. This means that the board will actually need four times as much memory as there is Xilinx data. This has not proved to be a problem so far, but volunteers to fix it are welcomed.