Optical Switch Testbed

The Optical Switching Testbed is a one year programme of research to establish a working, free-space multi-wavelength, multi-site, fibre-optic circuit switch. The system is to be constructed from a mixture of locally built and bought in components and operated over the Granta network of fibres between three sites: ORL, The Computer Laboratory and the Dept of Engineering. A detailed performance study of the testbed will be undertaken as part of the project, with particular emphasis on loss, crosstalk and characterisation of the error performance, over a variety of line codes, as experience by digital electronic line systems at the end systems.

Test System Description

Control of the data that will be generated is by C programs running on an ARM PIE processor card. An asynchronous parallel link connects the ARM processor to a 4010D Xilinx device which produces 40 a bit wide data output. The 40 bit wide data is serialised at a rate between 500 and 1.2 Gbps by a card containing fast chips. The serial electrical signal is converted to either a 1300nm or 1500 nm optical signal with a launch power of 1 to 2 mW according to the laser transmitter card used. The 1300 nm transmitters can be fine-tuned in wavelength by control of peltier heat pumps.

The optical signal from one of these sources is combined with signals from other such sources in order to produce a WDM signal. The combined optical signal is transmitted into the Granta Network were it goes to the optical switch, situated at Engineering. The optical switch is a 3x3 port device capabable of routing 1300nm signals differently from 1550nm signals. It takes each input fibre and first splits it three ways, then each of these three ways is WDM demultiplexed into a total of six fibres.

Each of the six fibres (3 in, 3 out) which connect to the switch are split in the same way, making a total of 36 fibre ends. These fibre ends are interconnected with 18 optical shutters arranged as two 3x3 crossbars, one for each wavelength.

The shutters consist of a 3cm free space optical path with a LCD panel in the middle. More exotic switches will be tried in future projects. The outputs from the switches are routed back to the three sites and wavelength split into separate monocolour channels. Each channel is fitted with an optical to electrical convertor. The serial output from the optical receiver is converted into a 40 bit parallel format by a card containing fast chips. The 40 bit data stream is tested by a card containing an XC4010D FPGA which notes errors and reports them to another ARM PIE microprocessor card over an 8 bit parallel handshook link.

October 1996

Some experiments have now been completed and a report has been written.