By default: small arrays become FPGA distributed RAMs or register files (FPGA tool decides).
Larger RAMs become block-RAMs bram with address latency of one cycle.
RAMs accessed by two threads become dual ported (or can generate an arbiter).
But for even larger we need to put offchip: in ZBT or DRAM.
class primes { static int limit = 1000 * 1000; // Specify which bank and what offset in that bank. [Kiwi.OutboardArray("portx", 200)] static bool [] PA = new bool[limit]; static public Main ( ) { } }
Currently: must manually instantiate a DRAM controller and optional cache in top-level wrapper. »Primes Finder (offchip DRAM ported)