SystemC: Hardware Modelling Library for C++

SystemC is a free library for C++ for hardware SoC modelling. »Download from www.accelera.org

SystemC was developed over the last ten years. There have been two major releases, 1.0 and 2.0. Also of importance is the TLM sub-library, TLM 2.0. (SystemC using transactional-level modelling (TLM/ESL) is covered later).

It includes (at least):

• A module description system where a module is a C++ class,

• An eventing and threading kernel,

• Compute/commit signals as well as other forms of channel,

• A library of fixed-precision integers,

• Plotting and logging facilities for generating output,

• A transactional modelling (TLM) sub-library.

Greaves developed the TLM_POWER3 add-on library for power modelling.

Originally aimed as an RTL replacement, for low-level hardware modelling.

Now being used for high-level (esp. transactional) modelling for architectural exploration.

Also sometimes used as an implementation language with its own synthesis tools. »SystemC Synthesis

Problem: hardware engineers are not C++ experts but they can be faced with confusing C++ error messages.

Benefit: General-purpose behavioural C code, including application code and device drivers, can all be modelled in a common language.

15: (C) 2012-17, DJ Greaves, University of Cambridge, Computer Laboratory.