Robert Mullins

Publications

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Talks and Tutorials

Talks are here...

Recent

Daniel Bates, Alex Bradbury, Andreas Koltes and Robert Mullins, Exploiting Tightly Coupled Cores, in Proc. Intl. Conf. on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), July 2013. PDF (IEEE Xplore)

Chris Fensch, Nick Barrow-Williams, Robert Mullins and Simon Moore, Designing a Physical Locality Aware Coherence Protocol for Chip-Multiprocessors, IEEE Transactions on Computers, 62(5), May 2013. IEEE Xplore

Arnab Banerjee, Pascal Wolkotte, Robert Mullins, Simon Moore and Gerard Smit, An Energy and Performance Exploration of Network-on-Chip Architectures, IEEE Transactions on VLSI Systems, Vol 17(3), pp. 319-329, March, 2009.

Rosemary Francis, Simon Moore and Robert Mullins, A Network of Time-Division Multiplexed Wiring for FPGAs, In Proceedings of the 2nd Intl. Symp. on Networks-on-Chips (NOCS), April 2008.

Arnab Banerjee, Robert Mullins and Simon Moore A Power and Energy Exploration of Network-on-Chip Architectures
In Proceedings of the First Intl. Symp. on Networks-on-Chips, May 2007.

Robert Mullins and Simon Moore, Demystifying Data-Driven and Pausible Clocking Schemes
In Proceedings of 13th IEEE Intl. Symp. on Asynchronous Circuits and Systems (ASYNC), March, 2007. PDF
(Slides - PPT / PDF )

Robert Mullins, Minimising Dynamic Power Consumption in On-Chip Networks
In Proceedings of the Intl. Symp. on System-on-Chip, Tampere, Finland, November 2006. PDF
(Slides - PPT / PDF )

Robert Mullins, Andrew West and Simon Moore, The Design and Implementation of a Low-Latency On-Chip Network
In Proceedings of the 11th Asia and South Pacific Design Automation Conference, January 2006. PDF / HTML (requires Flash)
(Slides PDF/ PPT )

Robert Mullins, Jeong-Gun Lee and Simon Moore, Selecting a Timing Regime for On-Chip Networks
In Proceedings of the 17th UK Asynchronous Forum, September, 2005. PDF

Robert Mullins, Andrew West and Simon Moore, Low-Latency Virtual-Channel Routers for On-Chip Networks
In Proceedings of the 31st Annual International Symposium on Computer Architecture (ISCA), June, 2004. PS / PDF / HTML (requires Flash)

2003-

Simon Moore, Ross Anderson, Robert Mullins, George Taylor and Jacques Fournier, Balanced Self-Checking Asynchronous Logic for Smart Card Applications
Microprocessors and Microsystems, Volume 27, Issue 9, October 2003, Pages 421-430. PDF

J. Fournier, H. Li, S.W. Moore, R.D. Mullins, G.S. Taylor, Security Evaluation of Asynchronous Circuits
Workshop on Cryptographic Hardware and Embedded Systems (CHES), September 2003. PDF Springer Link

Simon Moore, Robert Mullins and George Taylor, Simple switched GALS interconnect
Third ACiD-WG Worshop (5th Framework Programme), FORTH, Crete, January 2003.

2002

Huiyun Li, Simon Moore, Robert Mullins and George Taylor, Circuit Level Defences against Optical Fault Induction Attacks
13th UK Async. Forum, December, 2002. PDF

Simon Moore, Robert Mullins and George Taylor, The Springbank Test Chip, 12th UK Async. Forum, June, 2002.

R.D. Mullins, S.W. Moore, G.S. Taylor, Designing one-of-four encoded datapaths, 12th UK Async. Forum, June, 2002.

Simon Moore, Ross Anderson, Paul Cunningham, Robert Mullins, George Taylor, Improving Smart Card Security using Self-timed Circuits
Eighth International Symposium on Advanced Research in Asynchronous Circuits and Systems, April 2002. PDF

Simon Moore, George Taylor, Robert Mullins, Peter Robinson, Point to Point GALS Interconnect
Eighth International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC), 2002. PDF

George Taylor, Robert Mullins and Simon Moore, Exploiting both periodicity and asynchrony
Second ACiD-WG Worshop (5th Framework Programme), Munich, January 2002

2001

S.W.Moore, G.S.Taylor, R.D.Mullins and P.Robinson, Bundled-Data vs Clocked ASIC Design
10th UK Async. Forum, July, 2001.

S.W.Moore, G.S.Taylor, R.D.Mullins and P.Robinson, Channel Communication Between Independent Clock Domains
Fifth ACiD-WG Workshop, Nauchatel, 2001.

2000

S.W. Moore, G.S. Taylor, P.A. Cunningham, R.D. Mullins and P.Robinson, Self Calibrating Clocks for Globally Asynchronous Locally Synchronous Systems
International Conference on Computer Design (ICCD), Austin Texas, September 2000. PDF

S.W. Moore, G.S. Taylor, P.A. Cunningham, R.D. Mullins and P.Robinson, Using Stoppable Clocks to Safely Interface Asynchronous and Synchronous Subsystems
AINT (Asynchronous INTerfaces), Delft, Netherlands, July 2000.

D.K. Arvind and R.D. Mullins Instruction Issue and Data Forwarding Mechanisms for Asynchronous Superscalar Processors
Workshop on Complexity-Effective Design (WCED'00, held in conjunction with ISCA-27), June, 2000.

S.W. Moore, G.S. Taylor, P.A. Cunningham, R.D. Mullins and P.Robinson, Clock Stretching Circuits, 8th UK Async. Forum, June, 2000.

1999-

D.K. Arvind and R.D.Mullins A Fully Asynchronous Superscalar Processor
International Conference of Parallel Architectures and Compilation Techniques (PACT), October, 1999

D.K. Arvind, R.D.Mullins and V.E.F.Rebello Micronets: A model for decentralising control in asynchronous processor architectures
Proc. Int. Workshop on Asynchronous Design Methodologies, IEEE Press, May, 1995