Supervisions in VLSI Design

• Lectures will be given on Tuesdays and Thursdays at 10:00 in the Rayleigh Lecture Theatre, starting on Thursday 4 October.
• There will be no lectures on Thursday 25 October or Tuesday 30 October.
• Example classes will be held in place of the lectures on Thursday 1 November and Tuesday 27 November. The general format will be general questions and answers to clarify lecture material followed by discussion of some relevant Tripos questions.
• Supervisions will be organised for the last week of term.

Exercises for the first Examples Class

• CST 1995 Paper 7 Question 2 (CMOS NAND designs)
  Draw both the stick diagram and the layout. The discussion about symmetric rise and fall times requires some thought about the relative resistances of conducting n-channel and p-channel FETs.
• CST 1999 Paper 7 Question 1 (PLAs)
  Note that the primes after signal names indicate inversion, so there are three primary inputs and their inverses to be considered.
• CST 1986 Paper 1 Question 1 (Circuit analysis)

Exercises for the second Examples Class

• CST 1995 Paper 9 Question 1 (Design styles)
• CST 1997 Paper 9 Question 4 (Clocking)
• CST 1999 Paper 9 Question 2 (Muller C element)

Exercises for the Supervision

• CST 1998 Paper 7 Question 1 (CMOS invertors)
• CST 2000 Paper 9 Question 2 (Memory designs)
• CST 2000 Paper 7 Question 2 (Circuit analysis)
• CST 2001 Paper 9 Question 2 (Dynamic logic)
• CST 2001 Paper 8 Question 2 (Scaling)

Schedule of supervisions