Frequency scaling means adjusting the clock frequency to a subsystem.
The voltage will have to be scaled in tandem to ensure timing is met without wasting energy. Frequency scaling is software controlled by updating divider ratios.
Frequency adjustment can be instant if divider output is directly used. (But when PLLs with analog filters are used, there is inertia, e.g. 1 millisecond).
Voltage adjustment also has inertia and there is design and implementation complexity supporting more than a few voltage regions.
Clock Gating | Supply Gating | DVFS | |
Control: | automatic | various | software |
Granularity: | register / FSM | larger blocks | macroscopic. |
Clock Tree: | mostly free runs | turned off | slows down. |
Response time: | instant | 2 to 3 cycles | instant (or ms if PLL adjusted) |
Proportionally vary voltage: | not possible | n/a | yes. |
21: (C) 2008-17, DJ Greaves, University of Cambridge, Computer Laboratory. |