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I/O Blocks, Common Interface Nets.

We will consider a number of IP (interlectual property) blocks. All will be targets, most will also generate interrupts and some will also be initiators.

We use no bi-directional (tri-state) busses within our SoC: instead we use dedicated busses and multiplexor trees.

In this section we use the following RTL net names:

On an initiator the net directions will be reversed.

For simplicity, in this section, we assume a synchronous bus with no acknowledgement signal, meaning that every addressed target must respond in one clock cycle with no exceptions.

14: (C) 2008-13, DJ Greaves, University of Cambridge, Computer Laboratory.