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Example: Sequential Long Multiplication

Behavioural algorithm:
  while (1)
     wait (Start);
     RA=A; RB=B; RC=0;
       if odd(RA) RC=RC+RB;
       RA = RA >> 1;
       RB = RB << 1;
     Ready = 1;
     Ready = 0;
This implements conventional long multiplication.

It is certainly not fully-pipelined, it goes busy for many cycles, depening on the log of the A input. The illustration shows a common design pattern consisting of a datapath and a sequencer. Booth's algorithm (see additional material) is faster, still using one adder but needing half the clock ticks. Exercise: Write out the complete design, including sequencer, for the above multiplier, or that of Booth, or a long division unit, in Verilog or SystemC.

31: (C) 2008-12, DJ Greaves, University of Cambridge, Computer Laboratory.