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ACS P35-10/11 SoC D/M Slide Pack 2.2 (Design Partition)
Architectural Exploration and Design Partition
H/W to S/W Interfacing Techniques
H/W Design Partition
Chip Types and Classifications
IC Taxonomy
Semi-custom (cell-based) Design
Gate Arrays and Field-Programmable Logic.
FPGA - Field Programmable Gate Array
PALs and CPLDs
H/W versus S/W Design Partition Principles
Legacy H/W S/W Design Partition
An old example example: The Cambridge Fast Ring two chip set.
Partitioning example: An external RS-232/POTS Modem.
Partitioning example: A Bluetooth Module.
Cell Library Tour
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