What has `synthesisable' RTL traditionally provided ?
A circuit to swap two registers.
This PURE RTL form can
always @(posedge clk) begin x <= y; y <= x; endbe expressed with this behavioural program:
always @(posedge clk) begin t = x; x = y; y = t; end
The thread is confined to one always block.
The synchonisation with other circuits is fully manual and not obvious from the RTL (it's just in the head of the designer).
The amount of state, the state encoding and the register transfer paths are chosen completely manually.
|7: (C) 2012-18, DJ Greaves, University of Cambridge, Computer Laboratory.|