Synopsys Behavioural Compiler

... was an advanced (for the late 90's) compiler that extended RTL synthesis semantics. »Synopsys Behavioural Compiler Tutorial

• It implemented compile-time loop unrolling of loops containing event control (hence not like a generate construct that only elaborates structure),
• Arithmetic operations were freely moved between clock cycles,
• Additional cycles were inserted to overcome hazards (user's clock is called a `super state'),
• Provided temporally-floating I/O with compiler-chosen pipelining between ports.

Problem: Existing RTL paradigms not preserved within the same source file: existing syntax has new meaning.

Expert RTL users potentially lost their control over detailed structure in critical places.

Nonetheless, manual design of complex DSP accelerators using conventional RTL is very time consuming and error prone where the ALUs are heavily pipelined. So application-specific DSP compilers (such as Silage/Catherderal II) were widely used until general-purpose HLS tools matured.

Citations:

• Understanding Behavioral Synthesis, A Practical Guide to High Level Design by John P Elliott; Kluwer Academic Publishers ISBN 0-7923-8542-X
• Behavioral Synthesis, Digital System Design Using the Synopsys Behavioral Compiler by David W. Knapp, Prentice Hall, ISBN 0-13-569252-0