The Open Verification Methodology (OVM) is a documented methodology with a supporting building-block library for the verification of semiconductor chip designs.
»Doulos: From OVM to UVM
»run OVM simulations from a web browser
»Verification Methodology Cookbooks
(The OVM/UVM topics are non-examinable for part II CST.)
|22: (C) 2012-17, DJ Greaves, University of Cambridge, Computer Laboratory.|