Dr Sergei Skorobogatov
- Ph.D. in Computer Science, University of Cambridge, UK (2005)
- M.Sc. in Physics, Automatics and Electronics, Moscow Engineering Physics Institute (MEPhI, МИФИ), Russia (1997)
I have background in electronics, chemistry, computer science and physics. Before starting my research at the University of Cambridge in 2000, I was working for industry designing various electronic devices for eye sight diagnostic and correction.
I work in the Hardware Security field on attack technologies and tamper-resistant processors.
My Hardware Security research is aimed at finding vulnerabilities, hidden functions and backdoors in silicon chips. Many new attack methods and techniques were developed by me in the past decade.
I am a Direct-From-Memory project manager in collaboration with Quo Vadis Labs working on security analysis of semiconductor memory. Within the University part of the project I supervise a postdoctoral researcher Dr Franck Courbon. The project is aimed at exploring the limits for non-penetrative analysis of embedded memory for failure analysis and integrity testing purposes. We are developing new probing techniques to analyse the contents of on-chip semiconductor memory including but not limited to SRAM, ROM, EEPROM, Flash and FRAM (FeRAM) using non-invasive, semi-invasive and invasive methods. The project will run until April 2017 with possibility of extension.
Here is the list of some of my recent research projects:
- Failure analysis of embedded systems
- Searching for backdoors and Trojans in silicon devices
- Using new methods of side-channel analysis for finding backdoors and trojans in secure chips
- Using new technology for health monitoring of hardware systems used in automotive, aerospace and industrial applications
- Using side-channel analysis and fault attacks for partial reverse engineering of secure chips
- Developing new technology for effective side-channel analysis and secret key extraction from real-world devices
- Investigation of hardware security related problems in SRAM, Flash and EEPROM memory of semiconductor chips including microcontrollers, secure memory chips and FPGAs. Evaluation against: fault injection, data remanence, side-channel attacks, heating attacks, side-channel emission analysis attacks, bumping attacks, fault masking attacks and other recently discovered attacks
- Investigation of hardware security related problems in hardware encryption engines embedded into various semiconductor devices. Evaluation against: side-channel attacks, fault injection, side-channel emission, bumping and other recently discovered attacks
- Hardware security analysis of nonvolatile memory structures in microcontrollers, smartcards, CPLDs and FPGAs against all known attacks
- Flash Memory 'Bumping' Attacks
- Using Optical Emission Analysis for Estimating Contribution to Power Analysis
- Optically Enhanced Position-Locked Power Analysis
- Data remanence in EPROM, EEPROM and Flash memories
- Thermal imaging analysis of semiconductors
- Back side imaging techniques
- Fault injection attacks
- Laser scanning microscopy
- Side-channel attacks
Usually new areas of research require additional work force. For that collaborators from industry and academia are sought and new grant applications are submitted. Should a new postdoc position be open this will be announced at the University Job site.
I am a member of the following communities:
- Hardware-Oriented Security and Trust (HOST), Program Committee (2008, 2009, 2010, 2011, 2012, 2013, 2014, 2015, 2016)
- Cryptographic Hardware and Embedded Systems (CHES), Program Committee (2010, 2012, 2016)
- Fault Diagnosis and Tolerance in Cryptography (FDTC), Program Committee (2010, 2011, 2012, 2013, 2014, 2015, 2016)
- Smart Card Research and Advanced Application Conference (CARDIS), Program Committee (2011, 2012, 2013)
- Constructive Side-Channel Analysis and Secure Design (COSADE), Program Committee (2012)
- Digital System Design (DSD) Euromicro conference, Special Session Program Committee (2014, 2015, 2016)
- Design, Automation and Test in Europe (DATE), Program Committee (2017)
- European Research Council (ERC), Peer Reviewer (2010)
- Technology Foundation STW, Dutch Research Funding Council, Peer Reviewer (2013)
- Journal of Cryptographic Engineering (JCEN), Associate Editor and Peer Reviewer (2011, 2012, 2013, 2014, 2015)
- IEEE Transactions on Computers (TC), Peer Reviewer (2006, 2007, 2009, 2012, 2013, 2014)
- IEEE Transactions on Reliability (TR), Peer Reviewer (2014)
- IEEE Transactions on Computer-Aided Design of ICs and Systems (2014)
- Wiley Publisher, Reviewer (2010)
- Journal of Information Security, Peer Reviewer (2011)
- Journal of Microelectronics Reliability, Peer Reviewer (2012, 2013)
- Journal of Information Science and Engineering, Peer Reviewer (2013)
- The Computer Journal (COMPJ), Peer Reviewer (2013)
- ACM Transactions on Reconfigurable Technology and Systems, Peer Reviewer (2008, 2013)
- ACM Transactions on Information and System Security, Peer Reviewer (2013)
- Microprocessors and Microsystems (Elsevier), Peer Reviewer (2015)
Since 2013 I have been contributing to the PartIII/MPhil ACS course Current Applications and Research in Computer Security as a guest convener with topic "Tampering with hardware".
I am invited from time to time to give lectures about my research achievements. The usual places are security-related workshops and other universities. Please refer to my publications section for the full list.
I now have a dedicated teaching course on Hardware Security aimed at industrial engineers and graduate students. It covers the following subjects: Introduction to Hardware Security; Common mistakes in the design of secure hardware; Data remanence effects in memory; Imaging techniques and Optical attacks; Side-channel attacks; Lessons, Countermeasures and Defence technologies. The course was well received by various people from industry and academia. I now have a contract with a large industrial chip manufacturing company for running yearly teaching course for their design engineers during the next five years.
As an initial reading on the hardware security subject I recommend my PhD thesis and a book "Introduction to Hardware Security and Trust" to which I contributed on Physical Security (Chapter 7). For further reading please see my publications list. Also latest research achievements in that area are usually published at the following conferences: CHES, HOST, FDTC, COSADE and CARDIS.
If you are keen about Hardware Security, have some amazing projects in mind and want to do PhD research under my supervision please first see information about PhD degree at the Computer Laboratory before contacting me.
I am a project manager in collaboration with Quo Vadis Labs working on security analysis of semiconductor memory. Within the University part of the project I supervise a postdoctoral researcher Dr Franck Courbon. The project is aimed at exploring the limits for non-penetrative analysis of embedded memory for failure analysis and integrity testing purposes. We are developing new probing techniques to analyse the contents of on-chip semiconductor memory including but not limited to SRAM, ROM, EEPROM, Flash and FRAM (FeRAM) using non-invasive, semi-invasive and invasive methods. The project will run until April 2017 with possibility of extension.
I have been criticised a lot about the fact that most of the chips I analyse and publish successful attacks on, are built with 0.7-micron or even 0.9-micron technology. This is now changed, meaning that chips I use in my new research investigations are built with at least 0.5-micron technology (still popular in some secure chips) and some tests applied down to 90nm chips, with some interesting results recently published on 0.13-micron chips.
I was contacted many times in the past with questions about consulting projects I can perform here in the lab. It was mainly caused by rapidly growing concerns about hardware security of semiconductor products (mostly microcontrollers, CPLDs and FPGAs) and growing intellectual property theft in Asian countries where most outsourcing is taking place. Some projects were aimed on finding security flaws in existing devices in order to improve their security or to select the most secure parts from a list. Other projects were dedicated for teaching and educating personnel. While other projects were about developing of certain attack techniques. More information on the types of research projects and possible collaboration with industry.
Upcoming events (soonest first)
We are currently hiring a new postdoc to work on Security Analysis of Semiconductor Memory project for at least 12 months.
The cause of embedded systems sporadic failures was found and this could have very serious consequences. You might have come across situations when some microcontroller-based systems started behaving odd or stopped working. This might be home appliances, cars, industrial equipment etc. It seems that a serious reliability issue was overlooked and we might see more systems and devices starting to behave unpredictably or going off. If it is a toaster or microwave oven you can cope, but what about old electronic equipment used in cars, avionics and industrial infrastructure? Draft report will be published soon.
Past events (latest first)
Chip and Skim: cloning EMV cards with the pre-play attack. Co-authored paper presented at IEEE Symposium on Security and Privacy ("Oakland"), 18-21 May, 2014, San Jose, USA
I gave a talk at the Security Group seminar on 13 May 2014 (slides: Security, Reliability and Backdoors). I presented my research into backdoors present in hardware or embedded firmware causing a potential security threat. However, the reason for their existence is questionable. In this talk implications imposed by backdoors on real systems were presented at various levels from silicon hardware (SoC FPGA ), through embedded firmware (Smartcard) to system software (Industrial controller). I showed how the backdoors can be found and exploited. The aim of this talk was to raise a discussion about the influence of backdoors on security and reliability.
I gave a lecture course on Hardware Security of semiconductor chips at Nanyang Technological University in Singapore for undergraduates and PhD students of Temasek Laboratory department in May 2013.
I gave invited talk "Silicon scanning technology for hidden backdoors in semiconductor chips" at National University of Singapore, Department of Engineering on 20 May 2013.
My research proposal for the 2015-2016 academic year
(public open abstract part only; detailed proposal and other parts are confidential)
- Using new methods
of side-channel analysis for finding backdoors and trojans in secure chips
Status: ongoing research project
- Using side-channel
analysis and fault
attacks for partial reverse engineering of secure chips
Status: ongoing research project
- EEPROM and Flash memory analysis methods. This research
project is aimed on developing new techniques for analysing EEPROM and
Flash memory contents using semi-invasive methods.
Status: ongoing research project
- Investigation of hardware security related problems in Flash and EEPROM
memory structures. Evaluation against:
remanence, external influence, side-channel leakage, memory extraction
and new attacks.
Status: ongoing research project
- Practical use of fault-injection
attacks. We introduced these attacks in 2002. Unfortunately
they have still not been properly investigated. Research is needed to
estimate the requirements on these attacks for each chip manufacturing
technology and possible success rate. We are currently setting up the
equipment necessary for this research.
Status: ongoing research project
- Practical reverse engineering of programmable logic chips. It is
strongly believed that CPLDs and FPGAs offer superior IP protection by design as
there is no sequential programming execution flow and the device functionality
is obscured using proprietary encoding. The question is how far an attacker can
go by observing the device configuration process and analysing the differences.
Status: proposed research project
- Data remanence in EEPROM and Flash memory devices under special
conditions. Additional directions for my previous research on data
remanence in semiconductor memory devices.
Status: ongoing research projects
- Advanced optical probing attacks. Research into practical
methods of reading SRAM, EEPROM and Flash memory contents using
Status: proposed research project
- Advanced EMA attacks. Research into combining of EMA
attacks with semi-invasive methods.
Status: proposed research project
- High-resolution power analysis. Research into improving
effectiveness of power analysis attacks by using special data
acquisition, measurement and post-processing techniques.
Status: ongoing research project
- Using nanotechnologies for hardware security analysis.
Current trends in the miniaturisation of electronic devices demand the
ability to understand the structure and properties on the deep
submicron level (latest technology is 14nm and 10nm is already
proposed). Recent achievements in scanning probe microscopy allow us
to observe many characteristics of semiconductor chip surface such as
landscape (with atomic force microscopy), doping concentration (with
scanning capacitance microscopy), resistance (with scanning spreading
resistance microscopy), magnetic field (with magnetic force
microscopy), temperature (with scanning thermal microscopy), and many
others. We need research to estimate how much information could be
extracted from silicon chips by using such technologies. This research
might involve designing and building some special microscopes. As such
research requires large investments in equipment, it is difficult to
predict when it will be started.
Status: proposed research project
My scientific interests
- Computer Security, Hardware Security
- Optical fault attacks
- Flash Memory 'Bumping' Attacks
- Analog-to-Digital and Digital-to-Analog systems
- Embedded systems and controllers
- Precision submicron positioning systems
- Precision submicron whole-chip laser scanning
- High-resolution data acquisition
- Non-Invasive attacks on secure microcontrollers
- Semi-Invasive attacks on secure microcontrollers
- Invasive attacks on secure microcontrollers
- Memory remanence and data retention
- DPSS and diode lasers
- Microscopes and optical equipment
- Nonvolatile memory technology
- Semiconductor failure analysis
Some of my special skills and fields of knowledge include:
- Secure microcontrollers
- Tamper resistance, smartcard systems, analysis of secure systems
- Decapsulation and chemical (wet) etching
- Semi-invasive attacks
- FIB workstation (FEI Vectra 200)
- Laser cutting systems
- Probing stations and microprobing techniques
- Submicron mechanical positioning (stage1, stage2, stage3, stage4 ).
- Laser microscopy
- Advanced imaging techniques
- Assembler programming (8048, Z80, 8051, 6502, 80x86, 6805/08/11, PIC12/16/18/24, 68000, AVR, MIPS, ARM, MSP430, H8/300, PowerPC)
- C/C++ programming for PC and embedded systems
- Verilog HDL programming (Altera, Xilinx)
- Designing of hardware devices using CPLDs and FPGAs (Altera, Xilinx)
- Printed Circuit Boards (PCB) design
- IBM PC hardware design and programming
- Hardware design and programming for Sinclair ZX Spectrum, Nintendo (NES) game console, SEGA Megadrive game console
Some of my research and plans
My first security-related research project was an analysis of the copy protection mechanisms in modern microcontrollers. I still work in this area and I occasionally provide penetration testing and consulting services for old and new microcontroller designs. My work aims at understanding the detailed mechanism of how protection can be broken and how the security of new designs can be improved.
Using new methods of side-channel analysis for finding backdoors and trojans in secure chips.
My other research is more about a general evaluation of different memory structures against all kind of attacks, rather than testing any particular samples. As I expected long time ago (it was announced by me in 1999) Flash and EEPROM memories are not very good candidates for hardware security on their own, unless special attention was taken into data flow control and interface protocols. It was also suggested in my popular article on copy protection in microcontrollers with its first edition in year 2000. Much more information about various problems in EPROM, EEPROM and Flash memories are in my Ph.D. thesis which is available for public. My further research will involve detailed investigation in different Flash/EEPROM memory cells as well as in antifuse cells which are believed to be highly secure and my personal opinion is that it was not properly proved and tested. The next step would be learning and testing FRAM and MRAM memory structures as they are considered to be a highly secure replacement to Flash and EEPROM memories.
- Development and debugging of microcontroller based secure fiscal memory card for Cash Control Monitor (Master thesis project in University)
- System for ophthalmic rehabilitation based on Nintendo Game Console (Co-authorship in patent invention)
- Technology and special hardware devices for elimination of ophthalmic tension during work at CRT systems - TVs and Monitors (Patented in Co-authorship)
- System based on SEGA Nomad Game Console for analyzing topography of a human eye's cornea
How you can contact me
Dr Sergei P. Skorobogatov University of Cambridge Computer Laboratory William Gates Building 15 JJ Thomson Avenue Cambridge CB3 0FD United Kingdom
Phone: +44 (0)1223 763563 +44 (0)1223 763744 Fax: +44 (0)1223 334678 Email: Sergei.Skorobogatov (at) cl.cam.ac.uk sps32 (at) cl.cam.ac.uk sps32 (at) cam.ac.uk Sergei.Skorobogatov (at) hushmail.com
I always reply to personal emails. But sometimes due to server problems or spam filters mail could be lost. Therefore please resend your message if I have not replied within one week. In case of important messages I would prefer you to forward a copy of your letter to my HushMail address. Please avoid using HTML format in your emails (such messages are very likely to be filtered out) and ask my permission if you want to attach any files to your emails.
Please do not copy any of my publications onto your own Internet server for public access without explicit permission. If you want to refer to any of my texts, please use a hyperlink to my original and not a copy. I update these texts frequently and I want to prevent the confusion that arises if people read somewhere else obsolete versions that are not under my control.
Press releases September 2012
- Chip and pin 'weakness' exposed by Cambridge researchers. The BBC News, Technology, 11 September 2012.
- EMV protocol flaw allows 'pre-play' attacks against chip-enabled payment cards, researchers say. PC World, Security, 11 September 2012.
Press releases May 2012
- Cyber-attack concerns raised over Boeing 787 chip's 'back door'. The Guardian, 29 May 2012
- Researchers find backdoor in milspec silicon. The Register, 29 May 2012
- UK researchers discover backdoor in American military chip. Nextgov, 29 May 2012
- Proof That Military Chips From China Are Infected? Defense Tech, 30 May 2012
Press releases 2002
- 'Smart Card' Vulnerability Found. TechTV, 16 May 2002
- Optical Smart Card Attack Not a Major Risk. Information Security Magazine, 16 May 2002
- Camera flash opens up smart cards. New Scientist, 13 May 2002
- Vulnerability Is Discovered in Security for Smart Cards. The New York Times, Technology, 13 May 2002
- Hardware Security
- Video Imaging of Silicon Chips
- Data remanence in non-volatile semiconductor memory (Part I)
- Data remanence in non-volatile semiconductor memory (Part II)
- Power analysis attacks
- Optically enhanced position-locked power analysis
- Optical surveillance on silicon chips
- Silicon scanning reveals hidden backdoors in semiconductor chips
- Be prepared: The EMV pre-play attack. IEEE Security & Privacy, 2015.
- Chip and Skim: cloning EMV cards with the pre-play attack. IEEE Symposium on Security and Privacy ("Oakland"), May, 2014.
- Security, Reliability and Backdoors. Talk at the Security Group seminar 13 May 2014 (slides).
- Tamper resistance and hardware security. Guest lecture in the Part II Security course, 03 February 2014.
- I gave a lecture course on Hardware Security of semiconductor chips at Nanyang Technological University in Singapore for undergraduates and PhD students of Temasek Laboratory department in May 2013.
- I gave invited talk "Silicon scanning technology for hidden backdoors in semiconductor chips" at National University of Singapore, Department of Engineering on 20 May 2013.
- Tamper resistance and hardware security. Guest lecture in the Part II Security course, 04 February 2013.
- Chip and Skim: cloning EMV cards with the pre-play attack. Eprint arXiv:1209.2531, September 2012
- Breakthrough silicon scanning discovers backdoor in military chip. Cryptographic Hardware and Embedded Systems Workshop (CHES-2012), 9-12 September 2012, Leuven, Belgium, LNCS 7428, Springer, ISBN 978-3-642-33026-1, pp.23-40. (slides).
- In the blink of an eye: There goes your AES key. IACR Cryptology ePrint Archive, Report 2012/296, 2012.
- Integrated Circuit Investigation Method and Apparatus. Patent number WO2012/046029 A1
- Tamper resistance and hardware security. Guest lecture in the Part II Security course, 20 February 2012.
- Physical Attacks and Tamper Resistance. Chapter 7 in Introduction to Hardware Security and Trust, Eds: Mohammad Tehranipoor and Cliff Wang, Springer, September 2011, ISBN 978-1-4419-8079-3
- Hardware Security of Semiconductor Chips: Progress and Lessons. School of Computing Science, Newcastle University, 27 June 2011, Newcastle upon Tyne.
- Fault attacks on secure chips: from glitch to flash. ECRYPT2 School on Design and Security of Cryptographic Algorithms and Devices, 29 May-03 June 2011, Albena near Varna, Bulgaria.
- Side-channel attacks: new directions and horizons. ECRYPT2 School on Design and Security of Cryptographic Algorithms and Devices, 29 May-03 June 2011, Albena near Varna, Bulgaria.
- Physical Attacks on Tamper Resistance: Progress and Lessons. 2nd ARO Special Workshop on Hardware Assurance, 11-12 April 2011, Washington DC, USA.
- Synchronization method for SCA and fault attacks. Journal of Cryptographic Engineering (JCEN), Vol.1, No.1, Springer, 2011, pp.71-77.
- Bumping attacks: the affordable way of obtaining chip secrets. Talk at the Security Group seminar 7 December 2010 (slides).
- Tamper resistance and hardware security. Guest lecture in the Part II Security course, 5 November 2010.
- Optical Fault Masking Attacks. 7th Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC 2010), 21 August 2010, Santa Barbara, USA. IEEE-CS Press, ISBN 978-0-7695-4169-3, pp.23-29. (slides).
- Real world AES key extraction. Rump session at Cryptographic Hardware and Embedded Systems Workshop (CHES-2010), 19 August 2010, Santa Barbara, USA.
- Flash Memory 'Bumping' Attacks. Cryptographic Hardware and Embedded Systems Workshop (CHES-2010), 18-20 August 2010, LNCS 6225, Springer, ISBN 3-642-15030-6, pp.158-172. (slides).
- Fault and side-channel attacks on memory. PASTIS-2010 Workshop on PACA Security Trends in Embedded Systems, 16-17 June 2010, Gardanne, France (abstract and slides).
- Hardware security of silicon chips: progress, pitfalls and challenges for physical attacks. Lorentz Center Workshop on Provable Security against Physical Attacks. 15-19 February 2010, Leiden, Netherlands (abstract and slides).
- Tamper resistance and hardware security. Guest lecture in the Part II Security course, 20 November 2009.
- Optical surveillance on silicon chips: your crypto keys are visible. Talk at the Security Group seminar 13 October 2009. (slides).
- Using Optical Emission Analysis for Estimating Contribution to Power Analysis. 6th Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC 2009), 6 September 2009, Lausanne, Switzerland. IEEE-CS Press, ISBN 978-0-7695-3824-2, pp.111-119. (slides).
- Local Heating Attacks on Flash Memory Devices. 2nd IEEE International Workshop on Hardware-Oriented Security and Trust (HOST-2009), 27 July 2009, San Francisco, CA, USA. IEEE Xplore, ISBN 978-1-4244-4804-3. (slides).
- Hardware security: trends and pitfalls of the past decade. Talk at the Security Group seminar 20 January 2009 (slides).
- Tamper resistance and hardware security. Guest lecture in the Part II Security course, 24 November 2008.
- Semi-Invasive Extension to Physical Attacks. Securing Cyberspace: Applications and Foundations of Cryptography and Computer Security. Workshop IV: Special purpose hardware for cryptography: Attacks and Applications. 4-8 December 2006, Los Angeles (abstract and slides).
- Optically enhanced position-locked power analysis. Talk at the Security Group seminar 31 October 2006 (slides).
- Optically Enhanced Position-Locked Power Analysis. Cryptographic Hardware and Embedded Systems Workshop (CHES-2006), 11-13 October 2006, LNCS 4249, Springer, ISBN 3-540-46559-6, pp.61-75 (slides).
- Tamper resistance and physical attacks. Summer School on Cryptographic Hardware, Side-Channel and Fault Attacks (ECRYPT-2006), 12-15 June 2006, Louvain-la-Neuve (slides 1, slides 2, slides 3 and slides 4).
- Cryptographic Processors -- A Survey (Invited Paper). IEEE Proceedings, Special Issue on Cryptography and Security, February 2006, Vol.94, No.2, pp.357-369. Full version is available as a Technical Report UCAM-CL-TR-641.
- Data Remanence in Flash Memory Devices. Cryptographic Hardware and Embedded Systems Workshop (CHES-2005), 30 August - 1 September 2005, LNCS 3659, Springer, ISBN 3-540-28474-5, pp.339-353 (slides).
- Semi-invasive attacks - A new approach to hardware security analysis. Technical Report UCAM-CL-TR-630, University of Cambridge,Computer Laboratory, April 2005.
- Data remanence in non-volatile semiconductor memories. Part I: Introduction and non-invasive approach. Talk at the Security Group seminar 26 October 2004 (slides).
- On a New Way to Read Data from Memory. First International IEEE Security in Storage Workshop, 11 December 2002, Greenbelt Marriott, Maryland, USA.
- Optical Fault Induction Attacks. Cryptographic Hardware and Embedded Systems Workshop (CHES-2002), 13-15 August 2002, LNCS 2523, Springer-Verlag, ISBN 3-540-00409-2, pp.2-12 (slides, Russian version).
- Low Temperature Data Remanence in Static RAM. Technical Report UCAM-CL-TR-536, University of Cambridge,Computer Laboratory, June 2002.
- Copy Protection in Modern Microcontrollers is an overview of copy protection reliability in modern microcontrollers, 2000.
- Ispolzovanie Sfokusirovannogo Lazernogo Izlucheniya Dlya Izmeneniya Sostoyaniya Elementov KMOP IS //Electronics, Micro- and Nanoelectronics. MEPhI, Moscow, 2004, pp.67-72.
- Ispolzovanie Sfokusirovannogo Lazernogo Izlucheniya Dlya Opredeleniya Sostoyaniya Yacheek Pamyati KMOP OZU //Electronics, Micro- and Nanoelectronics. MEPhI, Moscow, 2003, pp.37-42.
- Smart-Karty - vzgljad na bezopasnost pri svete fotovspyshki //PLAS, Vol.6-7, 2002.
- Ataki metodom opticheskogo navedeniya oshibok. Approved translation of Optical Fault Induction Attacks paper. Cryptographic Hardware and Embedded Systems Workshop (CHES-2002), LNCS 2523, Springer-Verlag, ISBN 3-540-00409-2, pp.2-12.
- Vliyanie temperatury na vremya sohraneniya informacii v staticheskih OZU //Electronics, Micro- and Nanoelectronics. MEPhI, Moscow, 2001, pp.86-88
- Zaschita Sovremennyh Mikrokontrollerov ot Kopirovaniya //Automatics, Electronics, Microelectronics, Measurement Systems. MEPhI, Moscow, 2001, pp.84-85.
- Ispolzovanie Programmiruemyh Logicheskih Integralnyh Shem v Oftalmologicheskih Ustrojstvah //Electronics, Micro- and Nanoelectronics. MEPhI, Moscow, 1999, pp.99-103.
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