The test program is written in conventional C, and can be compiled to RISC-V or CHERI-RISC-V targets:

1. Compile print-pointer.c for the baseline architecture with the print-pointer-baseline make target.

print-pointer.c:

/*
 * SPDX-License-Identifier: BSD-2-Clause-DARPA-SSITH-ECATS-HR0011-18-C-0016
 * Copyright (c) 2020 SRI International
 */
#include <stdio.h>

int
main(void)
{
    printf("size of pointer: %zu\n", sizeof(void *));
    /* XXX: ideally we'd use ptraddr_t below */
    printf("size of address: %zu\n", sizeof(size_t));

    return (0);
}

2. Run the binary.
3. Compile print-pointer.c for the CHERI-aware architecture with the print-pointer-cheri make target.
4. Run the binary: it should print a pointer size of 16 and address size of 8.
5. Inspect both binaries with llvm-readelf -h and compare the Flags rows with each other.

The second test program is written in CHERI C:

5. Compile include print-capability.c for the CHERI-aware architecture with the print-capability make target.

/*
 * SPDX-License-Identifier: BSD-2-Clause-DARPA-SSITH-ECATS-HR0011-18-C-0016
 * Copyright (c) 2020 SRI International
 */
#include <stdio.h>
#include <cheriintrin.h>

int
main(void)
{
    int i;
    char *c;
    void *cap_to_int = &i;
    void *cap_to_cap = &c;

    printf("cap to int length: %lu\n", cheri_length_get(cap_to_int));
    printf("cap to cap length: %lu\n", cheri_length_get(cap_to_cap));

    return (0);
}

6. Run the binary: note how the length of the capability depends on the size of the type it points to.