Test Z6.3+sync+po+addr

Run Z6.3+sync+po+addr in model, using ppcmem

PPC Z6.3+sync+po+addr
"SyncdWW Wse PodWW Rfe DpAddrdR Fre"
Cycle=Rfe DpAddrdR Fre SyncdWW Wse PodWW
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r4=z;
2:r2=z; 2:r5=x;
}
 P0           | P1           | P2            ;
 li r1,1      | li r1,2      | lwz r1,0(r2)  ;
 stw r1,0(r2) | stw r1,0(r2) | xor r3,r1,r1  ;
 sync         | li r3,1      | lwzx r4,r3,r5 ;
 li r3,1      | stw r3,0(r4) |               ;
 stw r3,0(r4) |              |               ;
exists
(y=2 /\ 2:r1=1 /\ 2:r4=0)