Test IRRWIW+addr+sync

Run IRRWIW+addr+sync in model, using ppcmem

PPC IRRWIW+addr+sync
"Rfe DpAddrdR Fre Rfe SyncdRW Wse"
Cycle=Rfe SyncdRW Wse Rfe DpAddrdR Fre
{
0:r2=x;
1:r2=x; 1:r5=y;
2:r2=y;
3:r2=y; 3:r4=x;
}
 P0           | P1            | P2           | P3           ;
 li r1,2      | lwz r1,0(r2)  | li r1,1      | lwz r1,0(r2) ;
 stw r1,0(r2) | xor r3,r1,r1  | stw r1,0(r2) | sync         ;
              | lwzx r4,r3,r5 |              | li r3,1      ;
              |               |              | stw r3,0(r4) ;
exists
(x=2 /\ 1:r1=2 /\ 1:r4=0 /\ 3:r1=1)