Test SB+lwsync+isync

Run SB+lwsync+isync in model, using ppcmem

PPC SB+lwsync+isync
"LwSyncdWR Fre ISyncdWR Fre"
Cycle=Fre LwSyncdWR Fre ISyncdWR
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r4=x;
}
 P0           | P1           ;
 li r1,1      | li r1,1      ;
 stw r1,0(r2) | stw r1,0(r2) ;
 lwsync       | isync        ;
 lwz r3,0(r4) | lwz r3,0(r4) ;
exists
(0:r3=0 /\ 1:r3=0)