Test WRW+2W+dmb+dsb

Run WRW+2W+dmb+dsb in model, using armmem

ARM WRW+2W+dmb+dsb
"Rfe DMBdRW Wse DSBdWW Wse"
Cycle=Rfe DMBdRW Wse DSBdWW Wse
{
%x0=x;
%x1=x; %y1=y;
%y2=y; %x2=x;
}
 P0            | P1            | P2            ;
 MOV R0, #2    | LDR R0, [%x1] | MOV R0, #2    ;
 STR R0, [%x0] | DMB           | STR R0, [%y2] ;
               | MOV R1, #1    | DSB           ;
               | STR R1, [%y1] | MOV R1, #1    ;
               |               | STR R1, [%x2] ;
exists
(x=2 /\ y=2 /\ 1:R0=2)