Test S+po+dsb

Run S+po+dsb in model, using armmem

ARM S+po+dsb
"PodWW Rfe DSBdRW Wse"
Cycle=Rfe DSBdRW Wse PodWW
{
%x0=x; %y0=y;
%y1=y; %x1=x;
}
 P0            | P1            ;
 MOV R0, #2    | LDR R0, [%y1] ;
 STR R0, [%x0] | DSB           ;
 MOV R1, #1    | MOV R1, #1    ;
 STR R1, [%y0] | STR R1, [%x1] ;
exists
(x=2 /\ 1:R0=1)