Test ISA2+dmb+ctrlisb+addr

Run ISA2+dmb+ctrlisb+addr in model, using armmem

ARM ISA2+dmb+ctrlisb+addr
"DMBdWW Rfe DpCtrlIsbdW Rfe DpAddrdR Fre"
Cycle=Rfe DpAddrdR Fre DMBdWW Rfe DpCtrlIsbdW
{
%x0=x; %y0=y;
%y1=y; %z1=z;
%z2=z; %x2=x;
}
 P0            | P1            | P2               ;
 MOV R0, #1    | LDR R0, [%y1] | LDR R0, [%z2]    ;
 STR R0, [%x0] | CMP R0, R0    | EOR R1,R0,R0     ;
 DMB           | BNE LC00      | LDR R2, [R1,%x2] ;
 MOV R1, #1    | LC00:         |                  ;
 STR R1, [%y0] | ISB           |                  ;
               | MOV R1, #1    |                  ;
               | STR R1, [%z1] |                  ;
exists
(1:R0=1 /\ 2:R0=1 /\ 2:R2=0)