Key: ELF symbol (primary) ELF symbol source (with column ║) frame instruction +variable (range start) -variable (range end) inlining control-flow forwards branch ──> backwards branch ══>Compilation unit 000000cc 00000c58 arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
instructions
header
.debug_abbrev die abbreviation table
.debug_info die tree
.debug_line line number info
.debug_line evaluated line info
simple die tree
simple die tree globals
simple die tree locals
inlined subroutine info
inlined subroutine info by range
**000000cc <__sysreg_save_state_nvhe>:
000000cc <$x>:
+ __sysreg_save_state_nvhe params:
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0xcc 0x108 (DW_OP_breg31 0x8)
__sysreg_save_state_nvhe:22.0 (sysreg-sr.c) Sbepe ║{
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0xcc 0x108 (DW_OP_breg31 0x8) __sysreg_save_state_nvhe:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:21
~ 000000cc: d10083ff sub sp, sp, #0x20 <- 00002338(bl)<__sysreg_save_state_nvhe>,00002540(bl)<__sysreg_save_state_nvhe>
~ 000000d0: a9017bfd stp x29, x30, [sp, #16]
000000cc CFA:r31 r29:u r30:u
~ 000000d4: 910043fd add x29, sp, #0x10
~ 000000d8: f90007e0 str x0, [sp, #8]
__sysreg_save_state_nvhe:23.26 (sysreg-sr.c) SbePe __sysreg_save_el1_state(║ctxt);
~ 000000dc: f94007e0 ldr x0, [sp, #8]
__sysreg_save_state_nvhe:23.2 (sysreg-sr.c) sbepe ║__sysreg_save_el1_state(ctxt);
~ 000000e0: 9400000a bl 108 <__sysreg_save_el1_state>
__sysreg_save_state_nvhe:24.29 (sysreg-sr.c) Sbepe __sysreg_save_common_state(║ctxt);
~ 000000e4: f94007e0 ldr x0, [sp, #8] <- 000000e0(bl-succ)<return>
__sysreg_save_state_nvhe:24.2 (sysreg-sr.c) sbepe ║__sysreg_save_common_state(ctxt);
~ 000000e8: 940000a0 bl 368 <__sysreg_save_common_state>
__sysreg_save_state_nvhe:25.27 (sysreg-sr.c) Sbepe __sysreg_save_user_state(║ctxt);
~ 000000ec: f94007e0 ldr x0, [sp, #8] <- 000000e8(bl-succ)<return>
__sysreg_save_state_nvhe:25.2 (sysreg-sr.c) sbepe ║__sysreg_save_user_state(ctxt);
~ 000000f0: 940000a9 bl 394 <__sysreg_save_user_state>
__sysreg_save_state_nvhe:26.33 (sysreg-sr.c) Sbepe __sysreg_save_el2_return_state(║ctxt);
~ 000000f4: f94007e0 ldr x0, [sp, #8] <- 000000f0(bl-succ)<return>
__sysreg_save_state_nvhe:26.2 (sysreg-sr.c) sbepe ║__sysreg_save_el2_return_state(ctxt);
~ 000000f8: 940000b9 bl 3dc <__sysreg_save_el2_return_state>
__sysreg_save_state_nvhe:27.1 (sysreg-sr.c) Sbepe ║}
~ 000000fc: a9417bfd ldp x29, x30, [sp, #16] <- 000000f8(bl-succ)<return>
~ 00000100: 910083ff add sp, sp, #0x20
000000d8 CFA:r29+16 r29:c-16 r30:c-8
~ 00000104: d65f03c0 ret
-ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0xcc 0x108 (DW_OP_breg31 0x8) __sysreg_save_state_nvhe:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:21
**00000108 <__sysreg_save_el1_state>:
+ __sysreg_save_el1_state params:
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x108 0x368 (DW_OP_fbreg 0x158)
__sysreg_save_el1_state:30.0 (sysreg-sr.h) Sbepe ║{
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x108 0x368 (DW_OP_fbreg 0x158) __sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:29
~ 00000108: d105c3ff sub sp, sp, #0x170 <- 000000e0(bl)<__sysreg_save_el1_state>
00000108 CFA:r31 r29:u
~ 0000010c: f900b3fd str x29, [sp, #352]
~ 00000110: f900afe0 str x0, [sp, #344]
__sysreg_save_el1_state:31.35 (sysreg-sr.h) SbePe ctxt_sys_reg(ctxt, CSSELR_EL1) = ║read_sysreg(csselr_el1);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x114 0x128 (DW_OP_fbreg 0x150) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:31
~ 00000114: d53a0008 mrs x8, csselr_el1
~ 00000118: f900abe8 str x8, [sp, #336]
~ 0000011c: f940abe8 ldr x8, [sp, #336]
~ 00000120: f900a7e8 str x8, [sp, #328]
~ 00000124: f940a7e8 ldr x8, [sp, #328]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x114 0x128 (DW_OP_fbreg 0x150) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:31
__sysreg_save_el1_state:31.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, CSSELR_EL1) = read_sysreg(csselr_el1);
~ 00000128: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:31.33 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, CSSELR_EL1) ║= read_sysreg(csselr_el1);
~ 0000012c: f901a928 str x8, [x9, #848]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x130 0x144 (DW_OP_fbreg 0x140) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:32
~ 00000130: d5381008 mrs x8, sctlr_el1
__sysreg_save_el1_state:32.34 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, SCTLR_EL1) = ║read_sysreg_el1(SYS_SCTLR);
~ 00000134: f900a3e8 str x8, [sp, #320]
~ 00000138: f940a3e8 ldr x8, [sp, #320]
~ 0000013c: f9009fe8 str x8, [sp, #312]
~ 00000140: f9409fe8 ldr x8, [sp, #312]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x130 0x144 (DW_OP_fbreg 0x140) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:32
__sysreg_save_el1_state:32.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, SCTLR_EL1) = read_sysreg_el1(SYS_SCTLR);
~ 00000144: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:32.32 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, SCTLR_EL1) ║= read_sysreg_el1(SYS_SCTLR);
~ 00000148: f901ad28 str x8, [x9, #856]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x14c 0x160 (DW_OP_fbreg 0x130) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:33
~ 0000014c: d5381048 mrs x8, cpacr_el1
__sysreg_save_el1_state:33.34 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, CPACR_EL1) = ║read_sysreg_el1(SYS_CPACR);
~ 00000150: f9009be8 str x8, [sp, #304]
~ 00000154: f9409be8 ldr x8, [sp, #304]
~ 00000158: f90097e8 str x8, [sp, #296]
~ 0000015c: f94097e8 ldr x8, [sp, #296]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x14c 0x160 (DW_OP_fbreg 0x130) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:33
__sysreg_save_el1_state:33.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, CPACR_EL1) = read_sysreg_el1(SYS_CPACR);
~ 00000160: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:33.32 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, CPACR_EL1) ║= read_sysreg_el1(SYS_CPACR);
~ 00000164: f901b528 str x8, [x9, #872]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x168 0x17c (DW_OP_fbreg 0x120) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:34
~ 00000168: d5382008 mrs x8, ttbr0_el1
__sysreg_save_el1_state:34.34 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, TTBR0_EL1) = ║read_sysreg_el1(SYS_TTBR0);
~ 0000016c: f90093e8 str x8, [sp, #288]
~ 00000170: f94093e8 ldr x8, [sp, #288]
~ 00000174: f9008fe8 str x8, [sp, #280]
~ 00000178: f9408fe8 ldr x8, [sp, #280]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x168 0x17c (DW_OP_fbreg 0x120) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:34
__sysreg_save_el1_state:34.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, TTBR0_EL1) = read_sysreg_el1(SYS_TTBR0);
~ 0000017c: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:34.32 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, TTBR0_EL1) ║= read_sysreg_el1(SYS_TTBR0);
~ 00000180: f901bd28 str x8, [x9, #888]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x184 0x198 (DW_OP_fbreg 0x110) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:35
~ 00000184: d5382028 mrs x8, ttbr1_el1
__sysreg_save_el1_state:35.34 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, TTBR1_EL1) = ║read_sysreg_el1(SYS_TTBR1);
~ 00000188: f9008be8 str x8, [sp, #272]
~ 0000018c: f9408be8 ldr x8, [sp, #272]
~ 00000190: f90087e8 str x8, [sp, #264]
~ 00000194: f94087e8 ldr x8, [sp, #264]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x184 0x198 (DW_OP_fbreg 0x110) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:35
__sysreg_save_el1_state:35.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, TTBR1_EL1) = read_sysreg_el1(SYS_TTBR1);
~ 00000198: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:35.32 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, TTBR1_EL1) ║= read_sysreg_el1(SYS_TTBR1);
~ 0000019c: f901c128 str x8, [x9, #896]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1a0 0x1b4 (DW_OP_fbreg 0x100) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:36
~ 000001a0: d5382048 mrs x8, tcr_el1
__sysreg_save_el1_state:36.32 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, TCR_EL1) = ║read_sysreg_el1(SYS_TCR);
~ 000001a4: f90083e8 str x8, [sp, #256]
~ 000001a8: f94083e8 ldr x8, [sp, #256]
~ 000001ac: f9007fe8 str x8, [sp, #248]
~ 000001b0: f9407fe8 ldr x8, [sp, #248]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1a0 0x1b4 (DW_OP_fbreg 0x100) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:36
__sysreg_save_el1_state:36.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, TCR_EL1) = read_sysreg_el1(SYS_TCR);
~ 000001b4: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:36.30 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, TCR_EL1) ║= read_sysreg_el1(SYS_TCR);
~ 000001b8: f901c528 str x8, [x9, #904]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1bc 0x1d0 (DW_OP_fbreg 0xf0) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:37
~ 000001bc: d5385208 mrs x8, esr_el1
__sysreg_save_el1_state:37.32 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, ESR_EL1) = ║read_sysreg_el1(SYS_ESR);
~ 000001c0: f9007be8 str x8, [sp, #240]
~ 000001c4: f9407be8 ldr x8, [sp, #240]
~ 000001c8: f90077e8 str x8, [sp, #232]
~ 000001cc: f94077e8 ldr x8, [sp, #232]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1bc 0x1d0 (DW_OP_fbreg 0xf0) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:37
__sysreg_save_el1_state:37.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, ESR_EL1) = read_sysreg_el1(SYS_ESR);
~ 000001d0: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:37.30 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, ESR_EL1) ║= read_sysreg_el1(SYS_ESR);
~ 000001d4: f901c928 str x8, [x9, #912]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1d8 0x1ec (DW_OP_fbreg 0xe0) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:38
~ 000001d8: d5385108 mrs x8, afsr0_el1
__sysreg_save_el1_state:38.34 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, AFSR0_EL1) = ║read_sysreg_el1(SYS_AFSR0);
~ 000001dc: f90073e8 str x8, [sp, #224]
~ 000001e0: f94073e8 ldr x8, [sp, #224]
~ 000001e4: f9006fe8 str x8, [sp, #216]
~ 000001e8: f9406fe8 ldr x8, [sp, #216]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1d8 0x1ec (DW_OP_fbreg 0xe0) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:38
__sysreg_save_el1_state:38.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, AFSR0_EL1) = read_sysreg_el1(SYS_AFSR0);
~ 000001ec: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:38.32 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, AFSR0_EL1) ║= read_sysreg_el1(SYS_AFSR0);
~ 000001f0: f901cd28 str x8, [x9, #920]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1f4 0x208 (DW_OP_fbreg 0xd0) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:39
~ 000001f4: d5385128 mrs x8, afsr1_el1
__sysreg_save_el1_state:39.34 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, AFSR1_EL1) = ║read_sysreg_el1(SYS_AFSR1);
~ 000001f8: f9006be8 str x8, [sp, #208]
~ 000001fc: f9406be8 ldr x8, [sp, #208]
~ 00000200: f90067e8 str x8, [sp, #200]
~ 00000204: f94067e8 ldr x8, [sp, #200]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1f4 0x208 (DW_OP_fbreg 0xd0) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:39
__sysreg_save_el1_state:39.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, AFSR1_EL1) = read_sysreg_el1(SYS_AFSR1);
~ 00000208: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:39.32 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, AFSR1_EL1) ║= read_sysreg_el1(SYS_AFSR1);
~ 0000020c: f901d128 str x8, [x9, #928]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x210 0x224 (DW_OP_fbreg 0xc0) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:40
~ 00000210: d5386008 mrs x8, far_el1
__sysreg_save_el1_state:40.32 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, FAR_EL1) = ║read_sysreg_el1(SYS_FAR);
~ 00000214: f90063e8 str x8, [sp, #192]
~ 00000218: f94063e8 ldr x8, [sp, #192]
~ 0000021c: f9005fe8 str x8, [sp, #184]
~ 00000220: f9405fe8 ldr x8, [sp, #184]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x210 0x224 (DW_OP_fbreg 0xc0) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:40
__sysreg_save_el1_state:40.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, FAR_EL1) = read_sysreg_el1(SYS_FAR);
~ 00000224: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:40.30 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, FAR_EL1) ║= read_sysreg_el1(SYS_FAR);
~ 00000228: f901d528 str x8, [x9, #936]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x22c 0x240 (DW_OP_fbreg 0xb0) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:41
~ 0000022c: d538a208 mrs x8, mair_el1
__sysreg_save_el1_state:41.33 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, MAIR_EL1) = ║read_sysreg_el1(SYS_MAIR);
~ 00000230: f9005be8 str x8, [sp, #176]
~ 00000234: f9405be8 ldr x8, [sp, #176]
~ 00000238: f90057e8 str x8, [sp, #168]
~ 0000023c: f94057e8 ldr x8, [sp, #168]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x22c 0x240 (DW_OP_fbreg 0xb0) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:41
__sysreg_save_el1_state:41.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, MAIR_EL1) = read_sysreg_el1(SYS_MAIR);
~ 00000240: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:41.31 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, MAIR_EL1) ║= read_sysreg_el1(SYS_MAIR);
~ 00000244: f901d928 str x8, [x9, #944]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x248 0x25c (DW_OP_fbreg 0xa0) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:42
~ 00000248: d538c008 mrs x8, vbar_el1
__sysreg_save_el1_state:42.33 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, VBAR_EL1) = ║read_sysreg_el1(SYS_VBAR);
~ 0000024c: f90053e8 str x8, [sp, #160]
~ 00000250: f94053e8 ldr x8, [sp, #160]
~ 00000254: f9004fe8 str x8, [sp, #152]
~ 00000258: f9404fe8 ldr x8, [sp, #152]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x248 0x25c (DW_OP_fbreg 0xa0) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:42
__sysreg_save_el1_state:42.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, VBAR_EL1) = read_sysreg_el1(SYS_VBAR);
~ 0000025c: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:42.31 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, VBAR_EL1) ║= read_sysreg_el1(SYS_VBAR);
~ 00000260: f901dd28 str x8, [x9, #952]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x264 0x278 (DW_OP_fbreg 0x90) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:43
~ 00000264: d538d028 mrs x8, contextidr_el1
__sysreg_save_el1_state:43.39 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, CONTEXTIDR_EL1) = ║read_sysreg_el1(SYS_CONTEXTIDR);
~ 00000268: f9004be8 str x8, [sp, #144]
~ 0000026c: f9404be8 ldr x8, [sp, #144]
~ 00000270: f90047e8 str x8, [sp, #136]
~ 00000274: f94047e8 ldr x8, [sp, #136]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x264 0x278 (DW_OP_fbreg 0x90) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:43
__sysreg_save_el1_state:43.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, CONTEXTIDR_EL1) = read_sysreg_el1(SYS_CONTEXTIDR);
~ 00000278: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:43.37 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, CONTEXTIDR_EL1) ║= read_sysreg_el1(SYS_CONTEXTIDR);
~ 0000027c: f901e128 str x8, [x9, #960]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x280 0x294 (DW_OP_fbreg 0x80) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:44
~ 00000280: d538a308 mrs x8, amair_el1
__sysreg_save_el1_state:44.34 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, AMAIR_EL1) = ║read_sysreg_el1(SYS_AMAIR);
~ 00000284: f90043e8 str x8, [sp, #128]
~ 00000288: f94043e8 ldr x8, [sp, #128]
~ 0000028c: f9003fe8 str x8, [sp, #120]
~ 00000290: f9403fe8 ldr x8, [sp, #120]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x280 0x294 (DW_OP_fbreg 0x80) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:44
__sysreg_save_el1_state:44.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, AMAIR_EL1) = read_sysreg_el1(SYS_AMAIR);
~ 00000294: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:44.32 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, AMAIR_EL1) ║= read_sysreg_el1(SYS_AMAIR);
~ 00000298: f901f128 str x8, [x9, #992]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x29c 0x2b0 (DW_OP_fbreg 0x70) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:45
~ 0000029c: d538e108 mrs x8, cntkctl_el1
__sysreg_save_el1_state:45.36 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, CNTKCTL_EL1) = ║read_sysreg_el1(SYS_CNTKCTL);
~ 000002a0: f9003be8 str x8, [sp, #112]
~ 000002a4: f9403be8 ldr x8, [sp, #112]
~ 000002a8: f90037e8 str x8, [sp, #104]
~ 000002ac: f94037e8 ldr x8, [sp, #104]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x29c 0x2b0 (DW_OP_fbreg 0x70) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:45
__sysreg_save_el1_state:45.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, CNTKCTL_EL1) = read_sysreg_el1(SYS_CNTKCTL);
~ 000002b0: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:45.34 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, CNTKCTL_EL1) ║= read_sysreg_el1(SYS_CNTKCTL);
~ 000002b4: f901f528 str x8, [x9, #1000]
__sysreg_save_el1_state:46.32 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, PAR_EL1) = ║read_sysreg_par();
+par var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x2b8 0x2e4 (DW_OP_fbreg 0x60) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:46
~ 000002b8: d503201f nop
__sysreg_save_el1_state:46.32 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, PAR_EL1) = ║read_sysreg_par();
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x2bc 0x2d0 (DW_OP_fbreg 0x58) lexblock:lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:46
~ 000002bc: d5387408 mrs x8, par_el1
~ 000002c0: f9002fe8 str x8, [sp, #88]
~ 000002c4: f9402fe8 ldr x8, [sp, #88]
~ 000002c8: f9002be8 str x8, [sp, #80]
~ 000002cc: f9402be8 ldr x8, [sp, #80]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x2bc 0x2d0 (DW_OP_fbreg 0x58) lexblock:lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:46
__sysreg_save_el1_state:46.32 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, PAR_EL1) = ║read_sysreg_par();
~ 000002d0: f90033e8 str x8, [sp, #96]
~ 000002d4: d503201f nop
~ 000002d8: f94033e8 ldr x8, [sp, #96]
~ 000002dc: f90027e8 str x8, [sp, #72]
~ 000002e0: f94027e8 ldr x8, [sp, #72]
-par var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x2b8 0x2e4 (DW_OP_fbreg 0x60) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:46
__sysreg_save_el1_state:46.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, PAR_EL1) = read_sysreg_par();
~ 000002e4: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:46.30 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, PAR_EL1) ║= read_sysreg_par();
~ 000002e8: f901f928 str x8, [x9, #1008]
__sysreg_save_el1_state:47.34 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, TPIDR_EL1) = ║read_sysreg(tpidr_el1);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x2ec 0x300 (DW_OP_fbreg 0x40) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:47
~ 000002ec: d538d088 mrs x8, tpidr_el1
~ 000002f0: f90023e8 str x8, [sp, #64]
~ 000002f4: f94023e8 ldr x8, [sp, #64]
~ 000002f8: f9001fe8 str x8, [sp, #56]
~ 000002fc: f9401fe8 ldr x8, [sp, #56]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x2ec 0x300 (DW_OP_fbreg 0x40) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:47
__sysreg_save_el1_state:47.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, TPIDR_EL1) = read_sysreg(tpidr_el1);
~ 00000300: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:47.32 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, TPIDR_EL1) ║= read_sysreg(tpidr_el1);
~ 00000304: f901ed28 str x8, [x9, #984]
__sysreg_save_el1_state:49.31 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, SP_EL1) = ║read_sysreg(sp_el1);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x308 0x31c (DW_OP_fbreg 0x30) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:49
~ 00000308: d53c4108 mrs x8, sp_el1
~ 0000030c: f9001be8 str x8, [sp, #48]
~ 00000310: f9401be8 ldr x8, [sp, #48]
~ 00000314: f90017e8 str x8, [sp, #40]
~ 00000318: f94017e8 ldr x8, [sp, #40]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x308 0x31c (DW_OP_fbreg 0x30) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:49
__sysreg_save_el1_state:49.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, SP_EL1) = read_sysreg(sp_el1);
~ 0000031c: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:49.29 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, SP_EL1) ║= read_sysreg(sp_el1);
~ 00000320: f9035128 str x8, [x9, #1696]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x324 0x338 (DW_OP_fbreg 0x20) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:50
~ 00000324: d5384028 mrs x8, elr_el1
__sysreg_save_el1_state:50.32 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, ELR_EL1) = ║read_sysreg_el1(SYS_ELR);
~ 00000328: f90013e8 str x8, [sp, #32]
~ 0000032c: f94013e8 ldr x8, [sp, #32]
~ 00000330: f9000fe8 str x8, [sp, #24]
~ 00000334: f9400fe8 ldr x8, [sp, #24]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x324 0x338 (DW_OP_fbreg 0x20) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:50
__sysreg_save_el1_state:50.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, ELR_EL1) = read_sysreg_el1(SYS_ELR);
~ 00000338: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:50.30 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, ELR_EL1) ║= read_sysreg_el1(SYS_ELR);
~ 0000033c: f9034d28 str x8, [x9, #1688]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x340 0x354 (DW_OP_fbreg 0x10) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:51
~ 00000340: d5384008 mrs x8, spsr_el1
__sysreg_save_el1_state:51.33 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, SPSR_EL1) = ║read_sysreg_el1(SYS_SPSR);
~ 00000344: f9000be8 str x8, [sp, #16]
~ 00000348: f9400be8 ldr x8, [sp, #16]
~ 0000034c: f90007e8 str x8, [sp, #8]
~ 00000350: f94007e8 ldr x8, [sp, #8]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x340 0x354 (DW_OP_fbreg 0x10) lexblock:__sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:51
__sysreg_save_el1_state:51.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, SPSR_EL1) = read_sysreg_el1(SYS_SPSR);
~ 00000354: f940afe9 ldr x9, [sp, #344]
__sysreg_save_el1_state:51.31 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, SPSR_EL1) ║= read_sysreg_el1(SYS_SPSR);
~ 00000358: f9035528 str x8, [x9, #1704]
__sysreg_save_el1_state:52.1 (sysreg-sr.h) Sbepe ║}
~ 0000035c: f940b3fd ldr x29, [sp, #352]
~ 00000360: 9105c3ff add sp, sp, #0x170
00000110 CFA:r31+368 r29:c-16
~ 00000364: d65f03c0 ret
-ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x108 0x368 (DW_OP_fbreg 0x158) __sysreg_save_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:29
**00000368 <__sysreg_save_common_state>:
+ __sysreg_save_common_state params:
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x368 0x394 (DW_OP_fbreg 0x18)
__sysreg_save_common_state:19.0 (sysreg-sr.h) Sbepe ║{
00000368 CFA:r31
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x368 0x394 (DW_OP_fbreg 0x18) __sysreg_save_common_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:18
~ 00000368: d10083ff sub sp, sp, #0x20 <- 000000e8(bl)<__sysreg_save_common_state>
~ 0000036c: f9000fe0 str x0, [sp, #24]
__sysreg_save_common_state:20.34 (sysreg-sr.h) SbePe ctxt_sys_reg(ctxt, MDSCR_EL1) = ║read_sysreg(mdscr_el1);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x370 0x384 (DW_OP_fbreg 0x10) lexblock:__sysreg_save_common_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:20
~ 00000370: d5300248 mrs x8, mdscr_el1
~ 00000374: f9000be8 str x8, [sp, #16]
~ 00000378: f9400be8 ldr x8, [sp, #16]
~ 0000037c: f90007e8 str x8, [sp, #8]
~ 00000380: f94007e8 ldr x8, [sp, #8]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x370 0x384 (DW_OP_fbreg 0x10) lexblock:__sysreg_save_common_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:20
__sysreg_save_common_state:20.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, MDSCR_EL1) = read_sysreg(mdscr_el1);
~ 00000384: f9400fe9 ldr x9, [sp, #24]
__sysreg_save_common_state:20.32 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, MDSCR_EL1) ║= read_sysreg(mdscr_el1);
~ 00000388: f901fd28 str x8, [x9, #1016]
__sysreg_save_common_state:21.1 (sysreg-sr.h) Sbepe ║}
~ 0000038c: 910083ff add sp, sp, #0x20
0000036c CFA:r31+32
~ 00000390: d65f03c0 ret
-ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x368 0x394 (DW_OP_fbreg 0x18) __sysreg_save_common_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:18
**00000394 <__sysreg_save_user_state>:
+ __sysreg_save_user_state params:
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x394 0x3dc (DW_OP_fbreg 0x28)
__sysreg_save_user_state:24.0 (sysreg-sr.h) Sbepe ║{
00000394 CFA:r31
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x394 0x3dc (DW_OP_fbreg 0x28) __sysreg_save_user_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:23
~ 00000394: d100c3ff sub sp, sp, #0x30 <- 000000f0(bl)<__sysreg_save_user_state>
~ 00000398: f90017e0 str x0, [sp, #40]
__sysreg_save_user_state:25.34 (sysreg-sr.h) SbePe ctxt_sys_reg(ctxt, TPIDR_EL0) = ║read_sysreg(tpidr_el0);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x39c 0x3b0 (DW_OP_fbreg 0x20) lexblock:__sysreg_save_user_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:25
~ 0000039c: d53bd048 mrs x8, tpidr_el0
~ 000003a0: f90013e8 str x8, [sp, #32]
~ 000003a4: f94013e8 ldr x8, [sp, #32]
~ 000003a8: f9000fe8 str x8, [sp, #24]
~ 000003ac: f9400fe8 ldr x8, [sp, #24]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x39c 0x3b0 (DW_OP_fbreg 0x20) lexblock:__sysreg_save_user_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:25
__sysreg_save_user_state:25.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, TPIDR_EL0) = read_sysreg(tpidr_el0);
~ 000003b0: f94017e9 ldr x9, [sp, #40]
__sysreg_save_user_state:25.32 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, TPIDR_EL0) ║= read_sysreg(tpidr_el0);
~ 000003b4: f901e528 str x8, [x9, #968]
__sysreg_save_user_state:26.36 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, TPIDRRO_EL0) = ║read_sysreg(tpidrro_el0);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x3b8 0x3cc (DW_OP_fbreg 0x10) lexblock:__sysreg_save_user_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:26
~ 000003b8: d53bd068 mrs x8, tpidrro_el0
~ 000003bc: f9000be8 str x8, [sp, #16]
~ 000003c0: f9400be8 ldr x8, [sp, #16]
~ 000003c4: f90007e8 str x8, [sp, #8]
~ 000003c8: f94007e8 ldr x8, [sp, #8]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x3b8 0x3cc (DW_OP_fbreg 0x10) lexblock:__sysreg_save_user_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:26
__sysreg_save_user_state:26.2 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, TPIDRRO_EL0) = read_sysreg(tpidrro_el0);
~ 000003cc: f94017e9 ldr x9, [sp, #40]
__sysreg_save_user_state:26.34 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, TPIDRRO_EL0) ║= read_sysreg(tpidrro_el0);
~ 000003d0: f901e928 str x8, [x9, #976]
__sysreg_save_user_state:27.1 (sysreg-sr.h) Sbepe ║}
~ 000003d4: 9100c3ff add sp, sp, #0x30
00000398 CFA:r31+48
~ 000003d8: d65f03c0 ret
-ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x394 0x3dc (DW_OP_fbreg 0x28) __sysreg_save_user_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:23
**000003dc <__sysreg_save_el2_return_state>:
+ __sysreg_save_el2_return_state params:
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x3dc 0x500 (DW_OP_fbreg 0x38)
__sysreg_save_el2_return_state:55.0 (sysreg-sr.h) Sbepe ║{
000003dc CFA:r31
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x3dc 0x500 (DW_OP_fbreg 0x38) __sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:54
~ 000003dc: d101c3ff sub sp, sp, #0x70 <- 000000f8(bl)<__sysreg_save_el2_return_state>
~ 000003e0: f9001fe0 str x0, [sp, #56]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x3e4 0x3f8 (DW_OP_fbreg 0x30) lexblock:__sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:56
~ 000003e4: d53c4028 mrs x8, elr_el2
__sysreg_save_el2_return_state:56.20 (sysreg-sr.h) SbePe ctxt->regs.pc = ║read_sysreg_el2(SYS_ELR);
~ 000003e8: f9001be8 str x8, [sp, #48]
~ 000003ec: f9401be8 ldr x8, [sp, #48]
~ 000003f0: f90017e8 str x8, [sp, #40]
~ 000003f4: f94017e8 ldr x8, [sp, #40]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x3e4 0x3f8 (DW_OP_fbreg 0x30) lexblock:__sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:56
__sysreg_save_el2_return_state:56.2 (sysreg-sr.h) sbepe ║ctxt->regs.pc = read_sysreg_el2(SYS_ELR);
~ 000003f8: f9401fe9 ldr x9, [sp, #56]
__sysreg_save_el2_return_state:56.18 (sysreg-sr.h) sbepe ctxt->regs.pc ║= read_sysreg_el2(SYS_ELR);
~ 000003fc: f9008128 str x8, [x9, #256]
+reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x400 0x414 (DW_OP_fbreg 0x20) lexblock:__sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:57
~ 00000400: d53c4008 mrs x8, spsr_el2
__sysreg_save_el2_return_state:57.23 (sysreg-sr.h) Sbepe ctxt->regs.pstate = ║read_sysreg_el2(SYS_SPSR);
~ 00000404: f90013e8 str x8, [sp, #32]
~ 00000408: f94013e8 ldr x8, [sp, #32]
~ 0000040c: f9000fe8 str x8, [sp, #24]
~ 00000410: f9400fe8 ldr x8, [sp, #24]
-reg var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x400 0x414 (DW_OP_fbreg 0x20) lexblock:__sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:57
__sysreg_save_el2_return_state:57.2 (sysreg-sr.h) sbepe ║ctxt->regs.pstate = read_sysreg_el2(SYS_SPSR);
~ 00000414: f9401fe9 ldr x9, [sp, #56]
__sysreg_save_el2_return_state:57.21 (sysreg-sr.h) sbepe ctxt->regs.pstate ║= read_sysreg_el2(SYS_SPSR);
~ 00000418: f9008528 str x8, [x9, #264]
~ 0000041c: 5280032a mov w10, #0x19 // #25
~ 00000420: b90043ea str w10, [sp, #64]
l: 0x424 0x4cc cpus_have_final_cap inlined from __sysreg_save_el2_return_state:59 (sysreg-sr.h) <ee02>:
m: 0x424 0x44c system_capabilities_finalized inlined from cpus_have_final_cap:459 (cpufeature.h) <ee1f>:<ee02>:
lm system_capabilities_finalized:419.9 (cpufeature.h) Sbepe return ║static_branch_likely(&arm64_const_caps_ready);
+num param int (base type, DW_ATE_signed size:4) 0x424 0x4cc (DW_OP_fbreg 0x40) cpus_have_final_cap(inlined):__sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
+branch var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0x424 0x44c (DW_OP_fbreg 0x54) lexblock:system_capabilities_finalized(inlined):cpus_have_final_cap(inlined):__sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
~lm 00000424: f00000c8 adrp x8, 1b000 <hyp_memory+0x460>
~lm 00000428: b947990a ldr w10, [x8, #1944]
~lm 0000042c: 7100014a subs w10, w10, #0x0
~lm 00000430: 1a9f07eb cset w11, ne // ne = any
~lm 00000434: 390153eb strb w11, [sp, #84]
lm system_capabilities_finalized:419.9 (cpufeature.h) sbepe return ║static_branch_likely(&arm64_const_caps_ready);
~lm 00000438: 394153eb ldrb w11, [sp, #84]
~lm 0000043c: 2a0b03e8 mov w8, w11
~lm 00000440: 92400108 and x8, x8, #0x1
lm system_capabilities_finalized:419.9 (cpufeature.h) sbepe return ║static_branch_likely(&arm64_const_caps_ready);
~lm 00000444: f90027e8 str x8, [sp, #72]
lm system_capabilities_finalized:419.9 (cpufeature.h) sbepe return ║static_branch_likely(&arm64_const_caps_ready);
~lm 00000448: f94027e8 ldr x8, [sp, #72]
-branch var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0x424 0x44c (DW_OP_fbreg 0x54) lexblock:system_capabilities_finalized(inlined):cpus_have_final_cap(inlined):__sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
l cpus_have_final_cap:459.6 (cpufeature.h) Sbepe if (║system_capabilities_finalized())
~l ┌────0000044c: b4000388 cbz x8, 4bc <__sysreg_save_el2_return_state+0xe0>
│
~l │ ┌─00000450: 14000001 b 454 <__sysreg_save_el2_return_state+0x78> <- 0000044c(b.cc-succ)<fallthrough>
│ │
l │ │ cpus_have_final_cap:460.32 (cpufeature.h) Sbepe return __cpus_have_const_cap(║num);
~l │ └>00000454: b94043e8 ldr w8, [sp, #64] <- 00000450(b)<__sysreg_save_el2_return_state+0x78>
~l │ 00000458: b9006be8 str w8, [sp, #104]
n: 0x45c 0x4bc (0 of 2) __cpus_have_const_cap inlined from cpus_have_final_cap:460 (cpufeature.h) <ee4c>:<ee02>:
ln │ __cpus_have_const_cap:444.6 (cpufeature.h) Sbepe if (║num >= ARM64_NCAPS)
+num param int (base type, DW_ATE_signed size:4) 0x45c 0x4bc (DW_OP_fbreg 0x68) __cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
~ln │ 0000045c: b9406be8 ldr w8, [sp, #104]
ln │ __cpus_have_const_cap:444.6 (cpufeature.h) sbepe if (║num >= ARM64_NCAPS)
~ln │ 00000460: 7100f508 subs w8, w8, #0x3d
~ln │ ┌──00000464: 540000ab b.lt 478 <__sysreg_save_el2_return_state+0x9c> // b.tstop
│ │
~ln │ │┌─00000468: 14000001 b 46c <__sysreg_save_el2_return_state+0x90> <- 00000464(b.cc-succ)<fallthrough>
│ ││
~ln │ │└>0000046c: 2a1f03e8 mov w8, wzr <- 00000468(b)<__sysreg_save_el2_return_state+0x90>
ln │ │ __cpus_have_const_cap:445.3 (cpufeature.h) Sbepe ║return false;
~ln │ │ 00000470: 3901bfe8 strb w8, [sp, #111]
~ln │┌┼──00000474: 14000013 b 4c0 <__sysreg_save_el2_return_state+0xe4>
│││
ln │││ __cpus_have_const_cap:446.9 (cpufeature.h) Sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
+branch var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0x478 0x4ac (DW_OP_fbreg 0x64) lexblock:__cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
~ln ││└─>00000478: b9806be8 ldrsw x8, [sp, #104] <- 00000464(b.cc)<__sysreg_save_el2_return_state+0x9c>
~ln ││ 0000047c: d37ced08 lsl x8, x8, #4
~ln ││ 00000480: f00000c9 adrp x9, 1b000 <hyp_memory+0x460>
~ln ││ 00000484: 911e8129 add x9, x9, #0x7a0
~ln ││ 00000488: b868692a ldr w10, [x9, x8]
~ln ││ 0000048c: 7100014a subs w10, w10, #0x0
~ln ││ 00000490: 1a9f07eb cset w11, ne // ne = any
~ln ││ 00000494: 390193eb strb w11, [sp, #100]
ln ││ __cpus_have_const_cap:446.9 (cpufeature.h) sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
~ln ││ 00000498: 394193eb ldrb w11, [sp, #100]
~ln ││ 0000049c: 2a0b03e8 mov w8, w11
~ln ││ 000004a0: 92400108 and x8, x8, #0x1
ln ││ __cpus_have_const_cap:446.9 (cpufeature.h) sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
~ln ││ 000004a4: f9002fe8 str x8, [sp, #88]
ln ││ __cpus_have_const_cap:446.9 (cpufeature.h) sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
~ln ││ 000004a8: f9402fe8 ldr x8, [sp, #88]
-branch var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0x478 0x4ac (DW_OP_fbreg 0x64) lexblock:__cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
ln ││ __cpus_have_const_cap:446.9 (cpufeature.h) sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
~ln ││ 000004ac: f1000108 subs x8, x8, #0x0
~ln ││ 000004b0: 1a9f07eb cset w11, ne // ne = any
ln ││ __cpus_have_const_cap:446.2 (cpufeature.h) sbepe ║return static_branch_unlikely(&cpu_hwcap_keys[num]);
~ln ││ 000004b4: 3901bfeb strb w11, [sp, #111]
~ln ││ ┌─000004b8: 14000002 b 4c0 <__sysreg_save_el2_return_state+0xe4>
-num param int (base type, DW_ATE_signed size:4) 0x45c 0x4bc (DW_OP_fbreg 0x68) __cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
││ │
l ││ │ cpus_have_final_cap:462.3 (cpufeature.h) Sbepe ║BUG();
~l └┼─┼>000004bc: d4210000 brk #0x800 <- 0000044c(b.cc)<__sysreg_save_el2_return_state+0xe0>
│ │
o: 0x4c0 0x4c4 (1 of 2) __cpus_have_const_cap inlined from cpus_have_final_cap:460 (cpufeature.h) <ee4c>:<ee02>:
lo │ │ __cpus_have_const_cap:447.1 (cpufeature.h) Sbepe ║}
+num param int (base type, DW_ATE_signed size:4) 0x4c0 0x4c4 (DW_OP_fbreg 0x68) __cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
~lo └>└>000004c0: 3941bfe8 ldrb w8, [sp, #111] <- 00000474(b)<__sysreg_save_el2_return_state+0xe4>,000004b8(b)<__sysreg_save_el2_return_state+0xe4>
-num param int (base type, DW_ATE_signed size:4) 0x4c0 0x4c4 (DW_OP_fbreg 0x68) __cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
l cpus_have_final_cap:460.3 (cpufeature.h) Sbepe ║return __cpus_have_const_cap(num);
~l 000004c4: 39011fe8 strb w8, [sp, #71]
l cpus_have_final_cap:463.1 (cpufeature.h) Sbepe ║}
~l 000004c8: 39411fe8 ldrb w8, [sp, #71]
-num param int (base type, DW_ATE_signed size:4) 0x424 0x4cc (DW_OP_fbreg 0x40) cpus_have_final_cap(inlined):__sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
__sysreg_save_el2_return_state:59.6 (sysreg-sr.h) Sbepe if (║cpus_have_final_cap(ARM64_HAS_RAS_EXTN))
~ 000004cc: 71000508 subs w8, w8, #0x1
~ ┌───000004d0: 54000141 b.ne 4f8 <__sysreg_save_el2_return_state+0x11c> // b.any
│
~ │ ┌─000004d4: 14000001 b 4d8 <__sysreg_save_el2_return_state+0xfc> <- 000004d0(b.cc-succ)<fallthrough>
│ │
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x4d8 0x4ec (DW_OP_fbreg 0x10) lexblock:__sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:60
~ │ └>000004d8: d53cc128 mrs x8, vdisr_el2 <- 000004d4(b)<__sysreg_save_el2_return_state+0xfc>
│ __sysreg_save_el2_return_state:60.34 (sysreg-sr.h) Sbepe ctxt_sys_reg(ctxt, DISR_EL1) = ║read_sysreg_s(SYS_VDISR_EL2);
~ │ 000004dc: f9000be8 str x8, [sp, #16]
~ │ 000004e0: f9400be8 ldr x8, [sp, #16]
~ │ 000004e4: f90007e8 str x8, [sp, #8]
~ │ 000004e8: f94007e8 ldr x8, [sp, #8]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x4d8 0x4ec (DW_OP_fbreg 0x10) lexblock:__sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:60
│ __sysreg_save_el2_return_state:60.3 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, DISR_EL1) = read_sysreg_s(SYS_VDISR_EL2);
~ │ 000004ec: f9401fe9 ldr x9, [sp, #56]
│ __sysreg_save_el2_return_state:60.32 (sysreg-sr.h) sbepe ctxt_sys_reg(ctxt, DISR_EL1) ║= read_sysreg_s(SYS_VDISR_EL2);
~ │ 000004f0: f9020528 str x8, [x9, #1032]
│ __sysreg_save_el2_return_state:60.3 (sysreg-sr.h) sbepe ║ctxt_sys_reg(ctxt, DISR_EL1) = read_sysreg_s(SYS_VDISR_EL2);
~ │ ┌─000004f4: 14000001 b 4f8 <__sysreg_save_el2_return_state+0x11c>
│ │
│ │ __sysreg_save_el2_return_state:61.1 (sysreg-sr.h) Sbepe ║}
~ └>└>000004f8: 9101c3ff add sp, sp, #0x70 <- 000004d0(b.cc)<__sysreg_save_el2_return_state+0x11c>,000004f4(b)<__sysreg_save_el2_return_state+0x11c>
000003e0 CFA:r31+112
~ 000004fc: d65f03c0 ret
-ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x3dc 0x500 (DW_OP_fbreg 0x38) __sysreg_save_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:54
**00000500 <__sysreg_restore_state_nvhe>:
+ __sysreg_restore_state_nvhe params:
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x500 0x53c (DW_OP_breg31 0x8)
__sysreg_restore_state_nvhe:30.0 (sysreg-sr.c) Sbepe ║{
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x500 0x53c (DW_OP_breg31 0x8) __sysreg_restore_state_nvhe:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:29
~ 00000500: d10083ff sub sp, sp, #0x20 <- 00002350(bl)<__sysreg_restore_state_nvhe>,00002704(bl)<__sysreg_restore_state_nvhe>,00003928(bl)<__sysreg_restore_state_nvhe>
~ 00000504: a9017bfd stp x29, x30, [sp, #16]
00000500 CFA:r31 r29:u r30:u
~ 00000508: 910043fd add x29, sp, #0x10
~ 0000050c: f90007e0 str x0, [sp, #8]
__sysreg_restore_state_nvhe:31.29 (sysreg-sr.c) SbePe __sysreg_restore_el1_state(║ctxt);
~ 00000510: f94007e0 ldr x0, [sp, #8]
__sysreg_restore_state_nvhe:31.2 (sysreg-sr.c) sbepe ║__sysreg_restore_el1_state(ctxt);
~ 00000514: 9400000a bl 53c <__sysreg_restore_el1_state>
__sysreg_restore_state_nvhe:32.32 (sysreg-sr.c) Sbepe __sysreg_restore_common_state(║ctxt);
~ 00000518: f94007e0 ldr x0, [sp, #8] <- 00000514(bl-succ)<return>
__sysreg_restore_state_nvhe:32.2 (sysreg-sr.c) sbepe ║__sysreg_restore_common_state(ctxt);
~ 0000051c: 9400012f bl 9d8 <__sysreg_restore_common_state>
__sysreg_restore_state_nvhe:33.30 (sysreg-sr.c) Sbepe __sysreg_restore_user_state(║ctxt);
~ 00000520: f94007e0 ldr x0, [sp, #8] <- 0000051c(bl-succ)<return>
__sysreg_restore_state_nvhe:33.2 (sysreg-sr.c) sbepe ║__sysreg_restore_user_state(ctxt);
~ 00000524: 94000138 bl a04 <__sysreg_restore_user_state>
__sysreg_restore_state_nvhe:34.36 (sysreg-sr.c) Sbepe __sysreg_restore_el2_return_state(║ctxt);
~ 00000528: f94007e0 ldr x0, [sp, #8] <- 00000524(bl-succ)<return>
__sysreg_restore_state_nvhe:34.2 (sysreg-sr.c) sbepe ║__sysreg_restore_el2_return_state(ctxt);
~ 0000052c: 94000148 bl a4c <__sysreg_restore_el2_return_state>
__sysreg_restore_state_nvhe:35.1 (sysreg-sr.c) Sbepe ║}
~ 00000530: a9417bfd ldp x29, x30, [sp, #16] <- 0000052c(bl-succ)<return>
~ 00000534: 910083ff add sp, sp, #0x20
0000050c CFA:r29+16 r29:c-16 r30:c-8
~ 00000538: d65f03c0 ret
-ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x500 0x53c (DW_OP_breg31 0x8) __sysreg_restore_state_nvhe:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:29
**0000053c <__sysreg_restore_el1_state>:
+ __sysreg_restore_el1_state params:
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x53c 0x9d8 (DW_OP_fbreg 0xc0)
__sysreg_restore_el1_state:75.0 (sysreg-sr.h) Sbepe ║{
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x53c 0x9d8 (DW_OP_fbreg 0xc0) __sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:74
~ 0000053c: d10503ff sub sp, sp, #0x140 <- 00000514(bl)<__sysreg_restore_el1_state>
0000053c CFA:r31 r29:u
~ 00000540: f9009bfd str x29, [sp, #304]
~ 00000544: f90063e0 str x0, [sp, #192]
__sysreg_restore_el1_state:76.2 (sysreg-sr.h) SbePe ║write_sysreg(ctxt_sys_reg(ctxt, MPIDR_EL1), vmpidr_el2);
~ ┌─00000548: 14000001 b 54c <__sysreg_restore_el1_state+0x10>
│
│ __sysreg_restore_el1_state:76.2 (sysreg-sr.h) sbepe ║write_sysreg(ctxt_sys_reg(ctxt, MPIDR_EL1), vmpidr_el2);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x54c 0x564 (DW_OP_fbreg 0xb8) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:76
~ └>0000054c: f94063e8 ldr x8, [sp, #192] <- 00000548(b)<__sysreg_restore_el1_state+0x10>
~ 00000550: f941a508 ldr x8, [x8, #840]
~ 00000554: f9005fe8 str x8, [sp, #184]
~ 00000558: f9405fe8 ldr x8, [sp, #184]
~ 0000055c: d51c00a8 msr vmpidr_el2, x8
~ ┌─00000560: 14000001 b 564 <__sysreg_restore_el1_state+0x28>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x54c 0x564 (DW_OP_fbreg 0xb8) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:76
│
│ __sysreg_restore_el1_state:77.2 (sysreg-sr.h) Sbepe ║write_sysreg(ctxt_sys_reg(ctxt, CSSELR_EL1), csselr_el1);
~ ┌─└>00000564: 14000001 b 568 <__sysreg_restore_el1_state+0x2c> <- 00000560(b)<__sysreg_restore_el1_state+0x28>
│
│ __sysreg_restore_el1_state:77.2 (sysreg-sr.h) sbepe ║write_sysreg(ctxt_sys_reg(ctxt, CSSELR_EL1), csselr_el1);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x568 0x580 (DW_OP_fbreg 0xb0) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:77
~ └──>00000568: f94063e8 ldr x8, [sp, #192] <- 00000564(b)<__sysreg_restore_el1_state+0x2c>
~ 0000056c: f941a908 ldr x8, [x8, #848]
~ 00000570: f9005be8 str x8, [sp, #176]
~ 00000574: f9405be8 ldr x8, [sp, #176]
~ 00000578: d51a0008 msr csselr_el1, x8
~ ┌─0000057c: 14000001 b 580 <__sysreg_restore_el1_state+0x44>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x568 0x580 (DW_OP_fbreg 0xb0) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:77
│
~ └>00000580: 2a1f03e8 mov w8, wzr <- 0000057c(b)<__sysreg_restore_el1_state+0x44>
p: 0x584 0x58c has_vhe inlined from __sysreg_restore_el1_state:79 (sysreg-sr.h) <ef26>:
p has_vhe:113.3 (virt.h) Sbepe ║return false;
~p 00000584: 39033fe8 strb w8, [sp, #207]
p has_vhe:116.1 (virt.h) Sbepe ║}
~p 00000588: 39433fe8 ldrb w8, [sp, #207]
__sysreg_restore_el1_state:79.16 (sysreg-sr.h) Sbepe if (has_vhe() ||
~ ┌─────0000058c: 37000608 tbnz w8, #0, 64c <__sysreg_restore_el1_state+0x110>
│
~ │ ┌─00000590: 14000001 b 594 <__sysreg_restore_el1_state+0x58> <- 0000058c(b.cc-succ)<fallthrough>
│ │
~ │ └>00000594: 528004a8 mov w8, #0x25 // #37 <- 00000590(b)<__sysreg_restore_el1_state+0x58>
~ │ 00000598: b900d3e8 str w8, [sp, #208]
q: 0x59c 0x644 cpus_have_final_cap inlined from __sysreg_restore_el1_state:80 (sysreg-sr.h) <ef3a>:
r: 0x59c 0x5c4 system_capabilities_finalized inlined from cpus_have_final_cap:459 (cpufeature.h) <ef57>:<ef3a>:
qr │ system_capabilities_finalized:419.9 (cpufeature.h) Sbepe return ║static_branch_likely(&arm64_const_caps_ready);
+num param int (base type, DW_ATE_signed size:4) 0x59c 0x644 (DW_OP_fbreg 0xd0) cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
+branch var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0x59c 0x5c4 (DW_OP_fbreg 0xe4) lexblock:system_capabilities_finalized(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
~qr │ 0000059c: f00000c9 adrp x9, 1b000 <hyp_memory+0x460>
~qr │ 000005a0: b9479928 ldr w8, [x9, #1944]
~qr │ 000005a4: 71000108 subs w8, w8, #0x0
~qr │ 000005a8: 1a9f07ea cset w10, ne // ne = any
~qr │ 000005ac: 390393ea strb w10, [sp, #228]
qr │ system_capabilities_finalized:419.9 (cpufeature.h) sbepe return ║static_branch_likely(&arm64_const_caps_ready);
~qr │ 000005b0: 394393ea ldrb w10, [sp, #228]
~qr │ 000005b4: 2a0a03e9 mov w9, w10
~qr │ 000005b8: 92400129 and x9, x9, #0x1
qr │ system_capabilities_finalized:419.9 (cpufeature.h) sbepe return ║static_branch_likely(&arm64_const_caps_ready);
~qr │ 000005bc: f9006fe9 str x9, [sp, #216]
qr │ system_capabilities_finalized:419.9 (cpufeature.h) sbepe return ║static_branch_likely(&arm64_const_caps_ready);
~qr │ 000005c0: f9406fe9 ldr x9, [sp, #216]
-branch var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0x59c 0x5c4 (DW_OP_fbreg 0xe4) lexblock:system_capabilities_finalized(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
q │ cpus_have_final_cap:459.6 (cpufeature.h) Sbepe if (║system_capabilities_finalized())
~q │┌────000005c4: b4000389 cbz x9, 634 <__sysreg_restore_el1_state+0xf8>
││
~q ││ ┌─000005c8: 14000001 b 5cc <__sysreg_restore_el1_state+0x90> <- 000005c4(b.cc-succ)<fallthrough>
││ │
q ││ │ cpus_have_final_cap:460.32 (cpufeature.h) Sbepe return __cpus_have_const_cap(║num);
~q ││ └>000005cc: b940d3e8 ldr w8, [sp, #208] <- 000005c8(b)<__sysreg_restore_el1_state+0x90>
~q ││ 000005d0: b900fbe8 str w8, [sp, #248]
s: 0x5d4 0x634 (0 of 2) __cpus_have_const_cap inlined from cpus_have_final_cap:460 (cpufeature.h) <ef84>:<ef3a>:
qs ││ __cpus_have_const_cap:444.6 (cpufeature.h) Sbepe if (║num >= ARM64_NCAPS)
+num param int (base type, DW_ATE_signed size:4) 0x5d4 0x634 (DW_OP_fbreg 0xf8) __cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
~qs ││ 000005d4: b940fbe8 ldr w8, [sp, #248]
qs ││ __cpus_have_const_cap:444.6 (cpufeature.h) sbepe if (║num >= ARM64_NCAPS)
~qs ││ 000005d8: 7100f508 subs w8, w8, #0x3d
~qs ││ ┌──000005dc: 540000ab b.lt 5f0 <__sysreg_restore_el1_state+0xb4> // b.tstop
││ │
~qs ││ │┌─000005e0: 14000001 b 5e4 <__sysreg_restore_el1_state+0xa8> <- 000005dc(b.cc-succ)<fallthrough>
││ ││
~qs ││ │└>000005e4: 2a1f03e8 mov w8, wzr <- 000005e0(b)<__sysreg_restore_el1_state+0xa8>
qs ││ │ __cpus_have_const_cap:445.3 (cpufeature.h) Sbepe ║return false;
~qs ││ │ 000005e8: 3903fbe8 strb w8, [sp, #254]
~qs ││┌┼──000005ec: 14000013 b 638 <__sysreg_restore_el1_state+0xfc>
││││
qs ││││ __cpus_have_const_cap:446.9 (cpufeature.h) Sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
+branch var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0x5f0 0x624 (DW_OP_fbreg 0xf4) lexblock:__cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
~qs │││└─>000005f0: b980fbe8 ldrsw x8, [sp, #248] <- 000005dc(b.cc)<__sysreg_restore_el1_state+0xb4>
~qs │││ 000005f4: d37ced08 lsl x8, x8, #4
~qs │││ 000005f8: f00000c9 adrp x9, 1b000 <hyp_memory+0x460>
~qs │││ 000005fc: 911e8129 add x9, x9, #0x7a0
~qs │││ 00000600: b868692a ldr w10, [x9, x8]
~qs │││ 00000604: 7100014a subs w10, w10, #0x0
~qs │││ 00000608: 1a9f07eb cset w11, ne // ne = any
~qs │││ 0000060c: 3903d3eb strb w11, [sp, #244]
qs │││ __cpus_have_const_cap:446.9 (cpufeature.h) sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
~qs │││ 00000610: 3943d3eb ldrb w11, [sp, #244]
~qs │││ 00000614: 2a0b03e8 mov w8, w11
~qs │││ 00000618: 92400108 and x8, x8, #0x1
qs │││ __cpus_have_const_cap:446.9 (cpufeature.h) sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
~qs │││ 0000061c: f90077e8 str x8, [sp, #232]
qs │││ __cpus_have_const_cap:446.9 (cpufeature.h) sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
~qs │││ 00000620: f94077e8 ldr x8, [sp, #232]
-branch var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0x5f0 0x624 (DW_OP_fbreg 0xf4) lexblock:__cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
qs │││ __cpus_have_const_cap:446.9 (cpufeature.h) sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
~qs │││ 00000624: f1000108 subs x8, x8, #0x0
~qs │││ 00000628: 1a9f07eb cset w11, ne // ne = any
qs │││ __cpus_have_const_cap:446.2 (cpufeature.h) sbepe ║return static_branch_unlikely(&cpu_hwcap_keys[num]);
~qs │││ 0000062c: 3903fbeb strb w11, [sp, #254]
~qs │││ ┌─00000630: 14000002 b 638 <__sysreg_restore_el1_state+0xfc>
-num param int (base type, DW_ATE_signed size:4) 0x5d4 0x634 (DW_OP_fbreg 0xf8) __cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
│││ │
q │││ │ cpus_have_final_cap:462.3 (cpufeature.h) Sbepe ║BUG();
~q │└┼─┼>00000634: d4210000 brk #0x800 <- 000005c4(b.cc)<__sysreg_restore_el1_state+0xf8>
│ │ │
t: 0x638 0x63c (1 of 2) __cpus_have_const_cap inlined from cpus_have_final_cap:460 (cpufeature.h) <ef84>:<ef3a>:
qt │ │ │ __cpus_have_const_cap:447.1 (cpufeature.h) Sbepe ║}
+num param int (base type, DW_ATE_signed size:4) 0x638 0x63c (DW_OP_fbreg 0xf8) __cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
~qt │ └>└>00000638: 3943fbe8 ldrb w8, [sp, #254] <- 000005ec(b)<__sysreg_restore_el1_state+0xfc>,00000630(b)<__sysreg_restore_el1_state+0xfc>
-num param int (base type, DW_ATE_signed size:4) 0x638 0x63c (DW_OP_fbreg 0xf8) __cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
q │ cpus_have_final_cap:460.3 (cpufeature.h) Sbepe ║return __cpus_have_const_cap(num);
~q │ 0000063c: 39035fe8 strb w8, [sp, #215]
q │ cpus_have_final_cap:463.1 (cpufeature.h) Sbepe ║}
~q │ 00000640: 39435fe8 ldrb w8, [sp, #215]
-num param int (base type, DW_ATE_signed size:4) 0x59c 0x644 (DW_OP_fbreg 0xd0) cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
│ __sysreg_restore_el1_state:79.6 (sysreg-sr.h) Sbepe if (║has_vhe() ||
~ │ ┌──00000644: 37000228 tbnz w8, #0, 688 <__sysreg_restore_el1_state+0x14c>
│ │
~ │ │┌─00000648: 14000001 b 64c <__sysreg_restore_el1_state+0x110> <- 00000644(b.cc-succ)<fallthrough>
│ ││
│ ││ __sysreg_restore_el1_state:81.3 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR_EL1), SYS_SCTLR);
~ └>┌┼└>0000064c: 14000001 b 650 <__sysreg_restore_el1_state+0x114> <- 0000058c(b.cc)<__sysreg_restore_el1_state+0x110>,00000648(b)<__sysreg_restore_el1_state+0x110>
││
││ __sysreg_restore_el1_state:81.3 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR_EL1), SYS_SCTLR);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x650 0x668 (DW_OP_fbreg 0xa8) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:81
~ └┼─>00000650: f94063e8 ldr x8, [sp, #192] <- 0000064c(b)<__sysreg_restore_el1_state+0x114>
~ │ 00000654: f941ad08 ldr x8, [x8, #856]
~ │ 00000658: f90057e8 str x8, [sp, #168]
~ │ 0000065c: f94057e8 ldr x8, [sp, #168]
~ │ 00000660: d5181008 msr sctlr_el1, x8
~ │┌─00000664: 14000001 b 668 <__sysreg_restore_el1_state+0x12c>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x650 0x668 (DW_OP_fbreg 0xa8) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:81
││
││ __sysreg_restore_el1_state:82.3 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR);
~ ┌┼└>00000668: 14000001 b 66c <__sysreg_restore_el1_state+0x130> <- 00000664(b)<__sysreg_restore_el1_state+0x12c>
││
││ __sysreg_restore_el1_state:82.3 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x66c 0x684 (DW_OP_fbreg 0xa0) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:82
~ └┼─>0000066c: f94063e8 ldr x8, [sp, #192] <- 00000668(b)<__sysreg_restore_el1_state+0x130>
~ │ 00000670: f941c508 ldr x8, [x8, #904]
~ │ 00000674: f90053e8 str x8, [sp, #160]
~ │ 00000678: f94053e8 ldr x8, [sp, #160]
~ │ 0000067c: d5182048 msr tcr_el1, x8
~ │┌─00000680: 14000001 b 684 <__sysreg_restore_el1_state+0x148>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x66c 0x684 (DW_OP_fbreg 0xa0) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:82
││
││ __sysreg_restore_el1_state:83.2 (sysreg-sr.h) Sbepe ║} else if (!ctxt->__hyp_running_vcpu) {
~ ┌────┼└>00000684: 14000012 b 6cc <__sysreg_restore_el1_state+0x190> <- 00000680(b)<__sysreg_restore_el1_state+0x148>
│ │
│ │ __sysreg_restore_el1_state:83.14 (sysreg-sr.h) sbepe } else if (!║ctxt->__hyp_running_vcpu) {
~ │ └─>00000688: f94063e8 ldr x8, [sp, #192] <- 00000644(b.cc)<__sysreg_restore_el1_state+0x14c>
│ __sysreg_restore_el1_state:83.20 (sysreg-sr.h) sbepe } else if (!ctxt->║__hyp_running_vcpu) {
~ │ 0000068c: f9437d08 ldr x8, [x8, #1784]
│ __sysreg_restore_el1_state:83.13 (sysreg-sr.h) sbepe } else if (║!ctxt->__hyp_running_vcpu) {
~ │ ┌─────00000690: b50001c8 cbnz x8, 6c8 <__sysreg_restore_el1_state+0x18c>
│ │
~ │ │ ┌─00000694: 14000001 b 698 <__sysreg_restore_el1_state+0x15c> <- 00000690(b.cc-succ)<fallthrough>
│ │ │
│ │ │ __sysreg_restore_el1_state:89.3 (sysreg-sr.h) Sbepe ║write_sysreg_el1((ctxt_sys_reg(ctxt, TCR_EL1) |
~ │ │ ┌─└>00000698: 14000001 b 69c <__sysreg_restore_el1_state+0x160> <- 00000694(b)<__sysreg_restore_el1_state+0x15c>
│ │ │
│ │ │ __sysreg_restore_el1_state:89.3 (sysreg-sr.h) sbepe ║write_sysreg_el1((ctxt_sys_reg(ctxt, TCR_EL1) |
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x69c 0x6c0 (DW_OP_fbreg 0x98) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:89
~ │ │ └──>0000069c: f94063e8 ldr x8, [sp, #192] <- 00000698(b)<__sysreg_restore_el1_state+0x160>
~ │ │ 000006a0: f941c508 ldr x8, [x8, #904]
~ │ │ 000006a4: 320983e9 mov w9, #0x800080 // #8388736
~ │ │ 000006a8: 2a0903ea mov w10, w9
~ │ │ 000006ac: aa0a0108 orr x8, x8, x10
~ │ │ 000006b0: f9004fe8 str x8, [sp, #152]
~ │ │ 000006b4: f9404fe8 ldr x8, [sp, #152]
~ │ │ 000006b8: d5182048 msr tcr_el1, x8
~ │ │ ┌─000006bc: 14000001 b 6c0 <__sysreg_restore_el1_state+0x184>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x69c 0x6c0 (DW_OP_fbreg 0x98) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:89
│ │ │
│ │ │ __sysreg_restore_el1_state:92.3 (sysreg-sr.h) Sbepe ║isb();
~ │ │ └>000006c0: d5033fdf isb <- 000006bc(b)<__sysreg_restore_el1_state+0x184>
│ │ __sysreg_restore_el1_state:93.2 (sysreg-sr.h) Sbepe }
~ │ │ ┌─000006c4: 14000001 b 6c8 <__sysreg_restore_el1_state+0x18c>
│ │ │
~ │ └>┌─└>000006c8: 14000001 b 6cc <__sysreg_restore_el1_state+0x190> <- 00000690(b.cc)<__sysreg_restore_el1_state+0x18c>,000006c4(b)<__sysreg_restore_el1_state+0x18c>
│ │
│ │ __sysreg_restore_el1_state:95.2 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, CPACR_EL1), SYS_CPACR);
~ └>┌─└──>000006cc: 14000001 b 6d0 <__sysreg_restore_el1_state+0x194> <- 00000684(b)<__sysreg_restore_el1_state+0x190>,000006c8(b)<__sysreg_restore_el1_state+0x190>
│
│ __sysreg_restore_el1_state:95.2 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, CPACR_EL1), SYS_CPACR);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x6d0 0x6e8 (DW_OP_fbreg 0x90) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:95
~ └────>000006d0: f94063e8 ldr x8, [sp, #192] <- 000006cc(b)<__sysreg_restore_el1_state+0x194>
~ 000006d4: f941b508 ldr x8, [x8, #872]
~ 000006d8: f9004be8 str x8, [sp, #144]
~ 000006dc: f9404be8 ldr x8, [sp, #144]
~ 000006e0: d5181048 msr cpacr_el1, x8
~ ┌─000006e4: 14000001 b 6e8 <__sysreg_restore_el1_state+0x1ac>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x6d0 0x6e8 (DW_OP_fbreg 0x90) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:95
│
│ __sysreg_restore_el1_state:96.2 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, TTBR0_EL1), SYS_TTBR0);
~ ┌─└>000006e8: 14000001 b 6ec <__sysreg_restore_el1_state+0x1b0> <- 000006e4(b)<__sysreg_restore_el1_state+0x1ac>
│
│ __sysreg_restore_el1_state:96.2 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, TTBR0_EL1), SYS_TTBR0);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x6ec 0x704 (DW_OP_fbreg 0x88) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:96
~ └──>000006ec: f94063e8 ldr x8, [sp, #192] <- 000006e8(b)<__sysreg_restore_el1_state+0x1b0>
~ 000006f0: f941bd08 ldr x8, [x8, #888]
~ 000006f4: f90047e8 str x8, [sp, #136]
~ 000006f8: f94047e8 ldr x8, [sp, #136]
~ 000006fc: d5182008 msr ttbr0_el1, x8
~ ┌─00000700: 14000001 b 704 <__sysreg_restore_el1_state+0x1c8>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x6ec 0x704 (DW_OP_fbreg 0x88) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:96
│
│ __sysreg_restore_el1_state:97.2 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, TTBR1_EL1), SYS_TTBR1);
~ ┌─└>00000704: 14000001 b 708 <__sysreg_restore_el1_state+0x1cc> <- 00000700(b)<__sysreg_restore_el1_state+0x1c8>
│
│ __sysreg_restore_el1_state:97.2 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, TTBR1_EL1), SYS_TTBR1);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x708 0x720 (DW_OP_fbreg 0x80) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:97
~ └──>00000708: f94063e8 ldr x8, [sp, #192] <- 00000704(b)<__sysreg_restore_el1_state+0x1cc>
~ 0000070c: f941c108 ldr x8, [x8, #896]
~ 00000710: f90043e8 str x8, [sp, #128]
~ 00000714: f94043e8 ldr x8, [sp, #128]
~ 00000718: d5182028 msr ttbr1_el1, x8
~ ┌─0000071c: 14000001 b 720 <__sysreg_restore_el1_state+0x1e4>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x708 0x720 (DW_OP_fbreg 0x80) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:97
│
│ __sysreg_restore_el1_state:98.2 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, ESR_EL1), SYS_ESR);
~ ┌─└>00000720: 14000001 b 724 <__sysreg_restore_el1_state+0x1e8> <- 0000071c(b)<__sysreg_restore_el1_state+0x1e4>
│
│ __sysreg_restore_el1_state:98.2 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, ESR_EL1), SYS_ESR);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x724 0x73c (DW_OP_fbreg 0x78) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:98
~ └──>00000724: f94063e8 ldr x8, [sp, #192] <- 00000720(b)<__sysreg_restore_el1_state+0x1e8>
~ 00000728: f941c908 ldr x8, [x8, #912]
~ 0000072c: f9003fe8 str x8, [sp, #120]
~ 00000730: f9403fe8 ldr x8, [sp, #120]
~ 00000734: d5185208 msr esr_el1, x8
~ ┌─00000738: 14000001 b 73c <__sysreg_restore_el1_state+0x200>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x724 0x73c (DW_OP_fbreg 0x78) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:98
│
│ __sysreg_restore_el1_state:99.2 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, AFSR0_EL1), SYS_AFSR0);
~ ┌─└>0000073c: 14000001 b 740 <__sysreg_restore_el1_state+0x204> <- 00000738(b)<__sysreg_restore_el1_state+0x200>
│
│ __sysreg_restore_el1_state:99.2 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, AFSR0_EL1), SYS_AFSR0);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x740 0x758 (DW_OP_fbreg 0x70) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:99
~ └──>00000740: f94063e8 ldr x8, [sp, #192] <- 0000073c(b)<__sysreg_restore_el1_state+0x204>
~ 00000744: f941cd08 ldr x8, [x8, #920]
~ 00000748: f9003be8 str x8, [sp, #112]
~ 0000074c: f9403be8 ldr x8, [sp, #112]
~ 00000750: d5185108 msr afsr0_el1, x8
~ ┌─00000754: 14000001 b 758 <__sysreg_restore_el1_state+0x21c>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x740 0x758 (DW_OP_fbreg 0x70) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:99
│
│ __sysreg_restore_el1_state:100.2 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, AFSR1_EL1), SYS_AFSR1);
~ ┌─└>00000758: 14000001 b 75c <__sysreg_restore_el1_state+0x220> <- 00000754(b)<__sysreg_restore_el1_state+0x21c>
│
│ __sysreg_restore_el1_state:100.2 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, AFSR1_EL1), SYS_AFSR1);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x75c 0x774 (DW_OP_fbreg 0x68) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:100
~ └──>0000075c: f94063e8 ldr x8, [sp, #192] <- 00000758(b)<__sysreg_restore_el1_state+0x220>
~ 00000760: f941d108 ldr x8, [x8, #928]
~ 00000764: f90037e8 str x8, [sp, #104]
~ 00000768: f94037e8 ldr x8, [sp, #104]
~ 0000076c: d5185128 msr afsr1_el1, x8
~ ┌─00000770: 14000001 b 774 <__sysreg_restore_el1_state+0x238>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x75c 0x774 (DW_OP_fbreg 0x68) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:100
│
│ __sysreg_restore_el1_state:101.2 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, FAR_EL1), SYS_FAR);
~ ┌─└>00000774: 14000001 b 778 <__sysreg_restore_el1_state+0x23c> <- 00000770(b)<__sysreg_restore_el1_state+0x238>
│
│ __sysreg_restore_el1_state:101.2 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, FAR_EL1), SYS_FAR);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x778 0x790 (DW_OP_fbreg 0x60) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:101
~ └──>00000778: f94063e8 ldr x8, [sp, #192] <- 00000774(b)<__sysreg_restore_el1_state+0x23c>
~ 0000077c: f941d508 ldr x8, [x8, #936]
~ 00000780: f90033e8 str x8, [sp, #96]
~ 00000784: f94033e8 ldr x8, [sp, #96]
~ 00000788: d5186008 msr far_el1, x8
~ ┌─0000078c: 14000001 b 790 <__sysreg_restore_el1_state+0x254>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x778 0x790 (DW_OP_fbreg 0x60) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:101
│
│ __sysreg_restore_el1_state:102.2 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, MAIR_EL1), SYS_MAIR);
~ ┌─└>00000790: 14000001 b 794 <__sysreg_restore_el1_state+0x258> <- 0000078c(b)<__sysreg_restore_el1_state+0x254>
│
│ __sysreg_restore_el1_state:102.2 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, MAIR_EL1), SYS_MAIR);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x794 0x7ac (DW_OP_fbreg 0x58) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:102
~ └──>00000794: f94063e8 ldr x8, [sp, #192] <- 00000790(b)<__sysreg_restore_el1_state+0x258>
~ 00000798: f941d908 ldr x8, [x8, #944]
~ 0000079c: f9002fe8 str x8, [sp, #88]
~ 000007a0: f9402fe8 ldr x8, [sp, #88]
~ 000007a4: d518a208 msr mair_el1, x8
~ ┌─000007a8: 14000001 b 7ac <__sysreg_restore_el1_state+0x270>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x794 0x7ac (DW_OP_fbreg 0x58) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:102
│
│ __sysreg_restore_el1_state:103.2 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, VBAR_EL1), SYS_VBAR);
~ ┌─└>000007ac: 14000001 b 7b0 <__sysreg_restore_el1_state+0x274> <- 000007a8(b)<__sysreg_restore_el1_state+0x270>
│
│ __sysreg_restore_el1_state:103.2 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, VBAR_EL1), SYS_VBAR);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x7b0 0x7c8 (DW_OP_fbreg 0x50) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:103
~ └──>000007b0: f94063e8 ldr x8, [sp, #192] <- 000007ac(b)<__sysreg_restore_el1_state+0x274>
~ 000007b4: f941dd08 ldr x8, [x8, #952]
~ 000007b8: f9002be8 str x8, [sp, #80]
~ 000007bc: f9402be8 ldr x8, [sp, #80]
~ 000007c0: d518c008 msr vbar_el1, x8
~ ┌─000007c4: 14000001 b 7c8 <__sysreg_restore_el1_state+0x28c>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x7b0 0x7c8 (DW_OP_fbreg 0x50) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:103
│
│ __sysreg_restore_el1_state:104.2 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, CONTEXTIDR_EL1), SYS_CONTEXTIDR);
~ ┌─└>000007c8: 14000001 b 7cc <__sysreg_restore_el1_state+0x290> <- 000007c4(b)<__sysreg_restore_el1_state+0x28c>
│
│ __sysreg_restore_el1_state:104.2 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, CONTEXTIDR_EL1), SYS_CONTEXTIDR);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x7cc 0x7e4 (DW_OP_fbreg 0x48) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:104
~ └──>000007cc: f94063e8 ldr x8, [sp, #192] <- 000007c8(b)<__sysreg_restore_el1_state+0x290>
~ 000007d0: f941e108 ldr x8, [x8, #960]
~ 000007d4: f90027e8 str x8, [sp, #72]
~ 000007d8: f94027e8 ldr x8, [sp, #72]
~ 000007dc: d518d028 msr contextidr_el1, x8
~ ┌─000007e0: 14000001 b 7e4 <__sysreg_restore_el1_state+0x2a8>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x7cc 0x7e4 (DW_OP_fbreg 0x48) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:104
│
│ __sysreg_restore_el1_state:105.2 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, AMAIR_EL1), SYS_AMAIR);
~ ┌─└>000007e4: 14000001 b 7e8 <__sysreg_restore_el1_state+0x2ac> <- 000007e0(b)<__sysreg_restore_el1_state+0x2a8>
│
│ __sysreg_restore_el1_state:105.2 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, AMAIR_EL1), SYS_AMAIR);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x7e8 0x800 (DW_OP_fbreg 0x40) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:105
~ └──>000007e8: f94063e8 ldr x8, [sp, #192] <- 000007e4(b)<__sysreg_restore_el1_state+0x2ac>
~ 000007ec: f941f108 ldr x8, [x8, #992]
~ 000007f0: f90023e8 str x8, [sp, #64]
~ 000007f4: f94023e8 ldr x8, [sp, #64]
~ 000007f8: d518a308 msr amair_el1, x8
~ ┌─000007fc: 14000001 b 800 <__sysreg_restore_el1_state+0x2c4>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x7e8 0x800 (DW_OP_fbreg 0x40) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:105
│
│ __sysreg_restore_el1_state:106.2 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, CNTKCTL_EL1), SYS_CNTKCTL);
~ ┌─└>00000800: 14000001 b 804 <__sysreg_restore_el1_state+0x2c8> <- 000007fc(b)<__sysreg_restore_el1_state+0x2c4>
│
│ __sysreg_restore_el1_state:106.2 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, CNTKCTL_EL1), SYS_CNTKCTL);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x804 0x81c (DW_OP_fbreg 0x38) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:106
~ └──>00000804: f94063e8 ldr x8, [sp, #192] <- 00000800(b)<__sysreg_restore_el1_state+0x2c8>
~ 00000808: f941f508 ldr x8, [x8, #1000]
~ 0000080c: f9001fe8 str x8, [sp, #56]
~ 00000810: f9401fe8 ldr x8, [sp, #56]
~ 00000814: d518e108 msr cntkctl_el1, x8
~ ┌─00000818: 14000001 b 81c <__sysreg_restore_el1_state+0x2e0>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x804 0x81c (DW_OP_fbreg 0x38) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:106
│
│ __sysreg_restore_el1_state:107.2 (sysreg-sr.h) Sbepe ║write_sysreg(ctxt_sys_reg(ctxt, PAR_EL1), par_el1);
~ ┌─└>0000081c: 14000001 b 820 <__sysreg_restore_el1_state+0x2e4> <- 00000818(b)<__sysreg_restore_el1_state+0x2e0>
│
│ __sysreg_restore_el1_state:107.2 (sysreg-sr.h) sbepe ║write_sysreg(ctxt_sys_reg(ctxt, PAR_EL1), par_el1);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x820 0x838 (DW_OP_fbreg 0x30) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:107
~ └──>00000820: f94063e8 ldr x8, [sp, #192] <- 0000081c(b)<__sysreg_restore_el1_state+0x2e4>
~ 00000824: f941f908 ldr x8, [x8, #1008]
~ 00000828: f9001be8 str x8, [sp, #48]
~ 0000082c: f9401be8 ldr x8, [sp, #48]
~ 00000830: d5187408 msr par_el1, x8
~ ┌─00000834: 14000001 b 838 <__sysreg_restore_el1_state+0x2fc>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x820 0x838 (DW_OP_fbreg 0x30) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:107
│
│ __sysreg_restore_el1_state:108.2 (sysreg-sr.h) Sbepe ║write_sysreg(ctxt_sys_reg(ctxt, TPIDR_EL1), tpidr_el1);
~ ┌─└>00000838: 14000001 b 83c <__sysreg_restore_el1_state+0x300> <- 00000834(b)<__sysreg_restore_el1_state+0x2fc>
│
│ __sysreg_restore_el1_state:108.2 (sysreg-sr.h) sbepe ║write_sysreg(ctxt_sys_reg(ctxt, TPIDR_EL1), tpidr_el1);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x83c 0x854 (DW_OP_fbreg 0x28) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:108
~ └──>0000083c: f94063e8 ldr x8, [sp, #192] <- 00000838(b)<__sysreg_restore_el1_state+0x300>
~ 00000840: f941ed08 ldr x8, [x8, #984]
~ 00000844: f90017e8 str x8, [sp, #40]
~ 00000848: f94017e8 ldr x8, [sp, #40]
~ 0000084c: d518d088 msr tpidr_el1, x8
~ ┌─00000850: 14000001 b 854 <__sysreg_restore_el1_state+0x318>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x83c 0x854 (DW_OP_fbreg 0x28) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:108
│
~ └>00000854: 2a1f03e8 mov w8, wzr <- 00000850(b)<__sysreg_restore_el1_state+0x318>
u: 0x858 0x860 has_vhe inlined from __sysreg_restore_el1_state:110 (sysreg-sr.h) <f19d>:
u has_vhe:113.3 (virt.h) Sbepe ║return false;
~u 00000858: 3903ffe8 strb w8, [sp, #255]
u has_vhe:116.1 (virt.h) Sbepe ║}
~u 0000085c: 3943ffe8 ldrb w8, [sp, #255]
__sysreg_restore_el1_state:110.17 (sysreg-sr.h) Sbepe if (!has_vhe() &&
~ ┌───────────00000860: 370008c8 tbnz w8, #0, 978 <__sysreg_restore_el1_state+0x43c>
│
~ │ ┌─00000864: 14000001 b 868 <__sysreg_restore_el1_state+0x32c> <- 00000860(b.cc-succ)<fallthrough>
│ │
~ │ └>00000868: 528004a8 mov w8, #0x25 // #37 <- 00000864(b)<__sysreg_restore_el1_state+0x32c>
~ │ 0000086c: b90103e8 str w8, [sp, #256]
v: 0x870 0x918 cpus_have_final_cap inlined from __sysreg_restore_el1_state:111 (sysreg-sr.h) <f1b1>:
w: 0x870 0x898 system_capabilities_finalized inlined from cpus_have_final_cap:459 (cpufeature.h) <f1ce>:<f1b1>:
vw │ system_capabilities_finalized:419.9 (cpufeature.h) Sbepe return ║static_branch_likely(&arm64_const_caps_ready);
+num param int (base type, DW_ATE_signed size:4) 0x870 0x918 (DW_OP_fbreg 0x100) cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
+branch var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0x870 0x898 (DW_OP_fbreg 0x114) lexblock:system_capabilities_finalized(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
~vw │ 00000870: f00000c9 adrp x9, 1b000 <hyp_memory+0x460>
~vw │ 00000874: b9479928 ldr w8, [x9, #1944]
~vw │ 00000878: 71000108 subs w8, w8, #0x0
~vw │ 0000087c: 1a9f07ea cset w10, ne // ne = any
~vw │ 00000880: 390453ea strb w10, [sp, #276]
vw │ system_capabilities_finalized:419.9 (cpufeature.h) sbepe return ║static_branch_likely(&arm64_const_caps_ready);
~vw │ 00000884: 394453ea ldrb w10, [sp, #276]
~vw │ 00000888: 2a0a03e9 mov w9, w10
~vw │ 0000088c: 92400129 and x9, x9, #0x1
vw │ system_capabilities_finalized:419.9 (cpufeature.h) sbepe return ║static_branch_likely(&arm64_const_caps_ready);
~vw │ 00000890: f90087e9 str x9, [sp, #264]
vw │ system_capabilities_finalized:419.9 (cpufeature.h) sbepe return ║static_branch_likely(&arm64_const_caps_ready);
~vw │ 00000894: f94087e9 ldr x9, [sp, #264]
-branch var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0x870 0x898 (DW_OP_fbreg 0x114) lexblock:system_capabilities_finalized(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
v │ cpus_have_final_cap:459.6 (cpufeature.h) Sbepe if (║system_capabilities_finalized())
~v │ ┌────00000898: b4000389 cbz x9, 908 <__sysreg_restore_el1_state+0x3cc>
│ │
~v │ │ ┌─0000089c: 14000001 b 8a0 <__sysreg_restore_el1_state+0x364> <- 00000898(b.cc-succ)<fallthrough>
│ │ │
v │ │ │ cpus_have_final_cap:460.32 (cpufeature.h) Sbepe return __cpus_have_const_cap(║num);
~v │ │ └>000008a0: b94103e8 ldr w8, [sp, #256] <- 0000089c(b)<__sysreg_restore_el1_state+0x364>
~v │ │ 000008a4: b9012be8 str w8, [sp, #296]
x: 0x8a8 0x908 (0 of 2) __cpus_have_const_cap inlined from cpus_have_final_cap:460 (cpufeature.h) <f1fb>:<f1b1>:
vx │ │ __cpus_have_const_cap:444.6 (cpufeature.h) Sbepe if (║num >= ARM64_NCAPS)
+num param int (base type, DW_ATE_signed size:4) 0x8a8 0x908 (DW_OP_fbreg 0x128) __cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
~vx │ │ 000008a8: b9412be8 ldr w8, [sp, #296]
vx │ │ __cpus_have_const_cap:444.6 (cpufeature.h) sbepe if (║num >= ARM64_NCAPS)
~vx │ │ 000008ac: 7100f508 subs w8, w8, #0x3d
~vx │ │ ┌──000008b0: 540000ab b.lt 8c4 <__sysreg_restore_el1_state+0x388> // b.tstop
│ │ │
~vx │ │ │┌─000008b4: 14000001 b 8b8 <__sysreg_restore_el1_state+0x37c> <- 000008b0(b.cc-succ)<fallthrough>
│ │ ││
~vx │ │ │└>000008b8: 2a1f03e8 mov w8, wzr <- 000008b4(b)<__sysreg_restore_el1_state+0x37c>
vx │ │ │ __cpus_have_const_cap:445.3 (cpufeature.h) Sbepe ║return false;
~vx │ │ │ 000008bc: 3904bfe8 strb w8, [sp, #303]
~vx │ │┌┼──000008c0: 14000013 b 90c <__sysreg_restore_el1_state+0x3d0>
│ │││
vx │ │││ __cpus_have_const_cap:446.9 (cpufeature.h) Sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
+branch var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0x8c4 0x8f8 (DW_OP_fbreg 0x124) lexblock:__cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
~vx │ ││└─>000008c4: b9812be8 ldrsw x8, [sp, #296] <- 000008b0(b.cc)<__sysreg_restore_el1_state+0x388>
~vx │ ││ 000008c8: d37ced08 lsl x8, x8, #4
~vx │ ││ 000008cc: f00000c9 adrp x9, 1b000 <hyp_memory+0x460>
~vx │ ││ 000008d0: 911e8129 add x9, x9, #0x7a0
~vx │ ││ 000008d4: b868692a ldr w10, [x9, x8]
~vx │ ││ 000008d8: 7100014a subs w10, w10, #0x0
~vx │ ││ 000008dc: 1a9f07eb cset w11, ne // ne = any
~vx │ ││ 000008e0: 390493eb strb w11, [sp, #292]
vx │ ││ __cpus_have_const_cap:446.9 (cpufeature.h) sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
~vx │ ││ 000008e4: 394493eb ldrb w11, [sp, #292]
~vx │ ││ 000008e8: 2a0b03e8 mov w8, w11
~vx │ ││ 000008ec: 92400108 and x8, x8, #0x1
vx │ ││ __cpus_have_const_cap:446.9 (cpufeature.h) sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
~vx │ ││ 000008f0: f9008fe8 str x8, [sp, #280]
vx │ ││ __cpus_have_const_cap:446.9 (cpufeature.h) sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
~vx │ ││ 000008f4: f9408fe8 ldr x8, [sp, #280]
-branch var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0x8c4 0x8f8 (DW_OP_fbreg 0x124) lexblock:__cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
vx │ ││ __cpus_have_const_cap:446.9 (cpufeature.h) sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
~vx │ ││ 000008f8: f1000108 subs x8, x8, #0x0
~vx │ ││ 000008fc: 1a9f07eb cset w11, ne // ne = any
vx │ ││ __cpus_have_const_cap:446.2 (cpufeature.h) sbepe ║return static_branch_unlikely(&cpu_hwcap_keys[num]);
~vx │ ││ 00000900: 3904bfeb strb w11, [sp, #303]
~vx │ ││ ┌─00000904: 14000002 b 90c <__sysreg_restore_el1_state+0x3d0>
-num param int (base type, DW_ATE_signed size:4) 0x8a8 0x908 (DW_OP_fbreg 0x128) __cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
│ ││ │
v │ ││ │ cpus_have_final_cap:462.3 (cpufeature.h) Sbepe ║BUG();
~v │ └┼─┼>00000908: d4210000 brk #0x800 <- 00000898(b.cc)<__sysreg_restore_el1_state+0x3cc>
│ │ │
y: 0x90c 0x910 (1 of 2) __cpus_have_const_cap inlined from cpus_have_final_cap:460 (cpufeature.h) <f1fb>:<f1b1>:
vy │ │ │ __cpus_have_const_cap:447.1 (cpufeature.h) Sbepe ║}
+num param int (base type, DW_ATE_signed size:4) 0x90c 0x910 (DW_OP_fbreg 0x128) __cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
~vy │ └>└>0000090c: 3944bfe8 ldrb w8, [sp, #303] <- 000008c0(b)<__sysreg_restore_el1_state+0x3d0>,00000904(b)<__sysreg_restore_el1_state+0x3d0>
-num param int (base type, DW_ATE_signed size:4) 0x90c 0x910 (DW_OP_fbreg 0x128) __cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
v │ cpus_have_final_cap:460.3 (cpufeature.h) Sbepe ║return __cpus_have_const_cap(num);
~v │ 00000910: 39041fe8 strb w8, [sp, #263]
v │ cpus_have_final_cap:463.1 (cpufeature.h) Sbepe ║}
~v │ 00000914: 39441fe8 ldrb w8, [sp, #263]
-num param int (base type, DW_ATE_signed size:4) 0x870 0x918 (DW_OP_fbreg 0x100) cpus_have_final_cap(inlined):__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
│ __sysreg_restore_el1_state:111.59 (sysreg-sr.h) Sbepe cpus_have_final_cap(ARM64_WORKAROUND_SPECULATIVE_AT) &&
~ │ 00000918: 71000508 subs w8, w8, #0x1
~ │ ┌─────────0000091c: 540002e1 b.ne 978 <__sysreg_restore_el1_state+0x43c> // b.any
│ │
~ │ │ ┌─00000920: 14000001 b 924 <__sysreg_restore_el1_state+0x3e8> <- 0000091c(b.cc-succ)<fallthrough>
│ │ │
│ │ │ __sysreg_restore_el1_state:112.6 (sysreg-sr.h) Sbepe ║ctxt->__hyp_running_vcpu) {
~ │ │ └>00000924: f94063e8 ldr x8, [sp, #192] <- 00000920(b)<__sysreg_restore_el1_state+0x3e8>
│ │ __sysreg_restore_el1_state:112.12 (sysreg-sr.h) sbepe ctxt->║__hyp_running_vcpu) {
~ │ │ 00000928: f9437d08 ldr x8, [x8, #1784]
│ │ __sysreg_restore_el1_state:110.6 (sysreg-sr.h) Sbepe if (║!has_vhe() &&
~ │ │ ┌───────0000092c: b4000268 cbz x8, 978 <__sysreg_restore_el1_state+0x43c>
│ │ │
~ │ │ │ ┌─00000930: 14000001 b 934 <__sysreg_restore_el1_state+0x3f8> <- 0000092c(b.cc-succ)<fallthrough>
│ │ │ │
│ │ │ │ __sysreg_restore_el1_state:117.3 (sysreg-sr.h) Sbepe ║isb();
~ │ │ │ └>00000934: d5033fdf isb <- 00000930(b)<__sysreg_restore_el1_state+0x3f8>
│ │ │ __sysreg_restore_el1_state:123.3 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR_EL1), SYS_SCTLR);
~ │ │ │ ┌─00000938: 14000001 b 93c <__sysreg_restore_el1_state+0x400>
│ │ │ │
│ │ │ │ __sysreg_restore_el1_state:123.3 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR_EL1), SYS_SCTLR);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x93c 0x954 (DW_OP_fbreg 0x20) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:123
~ │ │ │ └>0000093c: f94063e8 ldr x8, [sp, #192] <- 00000938(b)<__sysreg_restore_el1_state+0x400>
~ │ │ │ 00000940: f941ad08 ldr x8, [x8, #856]
~ │ │ │ 00000944: f90013e8 str x8, [sp, #32]
~ │ │ │ 00000948: f94013e8 ldr x8, [sp, #32]
~ │ │ │ 0000094c: d5181008 msr sctlr_el1, x8
~ │ │ │ ┌─00000950: 14000001 b 954 <__sysreg_restore_el1_state+0x418>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x93c 0x954 (DW_OP_fbreg 0x20) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:123
│ │ │ │
│ │ │ │ __sysreg_restore_el1_state:124.3 (sysreg-sr.h) Sbepe ║isb();
~ │ │ │ └>00000954: d5033fdf isb <- 00000950(b)<__sysreg_restore_el1_state+0x418>
│ │ │ __sysreg_restore_el1_state:125.3 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR);
~ │ │ │ ┌─00000958: 14000001 b 95c <__sysreg_restore_el1_state+0x420>
│ │ │ │
│ │ │ │ __sysreg_restore_el1_state:125.3 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x95c 0x974 (DW_OP_fbreg 0x18) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:125
~ │ │ │ └>0000095c: f94063e8 ldr x8, [sp, #192] <- 00000958(b)<__sysreg_restore_el1_state+0x420>
~ │ │ │ 00000960: f941c508 ldr x8, [x8, #904]
~ │ │ │ 00000964: f9000fe8 str x8, [sp, #24]
~ │ │ │ 00000968: f9400fe8 ldr x8, [sp, #24]
~ │ │ │ 0000096c: d5182048 msr tcr_el1, x8
~ │ │ │ ┌─00000970: 14000001 b 974 <__sysreg_restore_el1_state+0x438>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x95c 0x974 (DW_OP_fbreg 0x18) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:125
│ │ │ │
│ │ │ │ __sysreg_restore_el1_state:126.2 (sysreg-sr.h) Sbepe }
~ │ │ │ ┌─└>00000974: 14000001 b 978 <__sysreg_restore_el1_state+0x43c> <- 00000970(b)<__sysreg_restore_el1_state+0x438>
│ │ │ │
│ │ │ │ __sysreg_restore_el1_state:128.2 (sysreg-sr.h) Sbepe ║write_sysreg(ctxt_sys_reg(ctxt, SP_EL1), sp_el1);
~ └>└>└>┌─└──>00000978: 14000001 b 97c <__sysreg_restore_el1_state+0x440> <- 00000860(b.cc)<__sysreg_restore_el1_state+0x43c>,0000091c(b.cc)<__sysreg_restore_el1_state+0x43c>,0000092c(b.cc)<__sysreg_restore_el1_state+0x43c>,00000974(b)<__sysreg_restore_el1_state+0x43c>
│
│ __sysreg_restore_el1_state:128.2 (sysreg-sr.h) sbepe ║write_sysreg(ctxt_sys_reg(ctxt, SP_EL1), sp_el1);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x97c 0x994 (DW_OP_fbreg 0x10) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:128
~ └────>0000097c: f94063e8 ldr x8, [sp, #192] <- 00000978(b)<__sysreg_restore_el1_state+0x440>
~ 00000980: f9435108 ldr x8, [x8, #1696]
~ 00000984: f9000be8 str x8, [sp, #16]
~ 00000988: f9400be8 ldr x8, [sp, #16]
~ 0000098c: d51c4108 msr sp_el1, x8
~ ┌─00000990: 14000001 b 994 <__sysreg_restore_el1_state+0x458>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x97c 0x994 (DW_OP_fbreg 0x10) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:128
│
│ __sysreg_restore_el1_state:129.2 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, ELR_EL1), SYS_ELR);
~ ┌─└>00000994: 14000001 b 998 <__sysreg_restore_el1_state+0x45c> <- 00000990(b)<__sysreg_restore_el1_state+0x458>
│
│ __sysreg_restore_el1_state:129.2 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, ELR_EL1), SYS_ELR);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x998 0x9b0 (DW_OP_fbreg 0x8) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:129
~ └──>00000998: f94063e8 ldr x8, [sp, #192] <- 00000994(b)<__sysreg_restore_el1_state+0x45c>
~ 0000099c: f9434d08 ldr x8, [x8, #1688]
~ 000009a0: f90007e8 str x8, [sp, #8]
~ 000009a4: f94007e8 ldr x8, [sp, #8]
~ 000009a8: d5184028 msr elr_el1, x8
~ ┌─000009ac: 14000001 b 9b0 <__sysreg_restore_el1_state+0x474>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x998 0x9b0 (DW_OP_fbreg 0x8) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:129
│
│ __sysreg_restore_el1_state:130.2 (sysreg-sr.h) Sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, SPSR_EL1), SYS_SPSR);
~ ┌─└>000009b0: 14000001 b 9b4 <__sysreg_restore_el1_state+0x478> <- 000009ac(b)<__sysreg_restore_el1_state+0x474>
│
│ __sysreg_restore_el1_state:130.2 (sysreg-sr.h) sbepe ║write_sysreg_el1(ctxt_sys_reg(ctxt, SPSR_EL1), SYS_SPSR);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x9b4 0x9cc (DW_OP_fbreg 0x0) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:130
~ └──>000009b4: f94063e8 ldr x8, [sp, #192] <- 000009b0(b)<__sysreg_restore_el1_state+0x478>
~ 000009b8: f9435508 ldr x8, [x8, #1704]
~ 000009bc: f90003e8 str x8, [sp]
~ 000009c0: f94003e8 ldr x8, [sp]
~ 000009c4: d5184008 msr spsr_el1, x8
~ ┌─000009c8: 14000001 b 9cc <__sysreg_restore_el1_state+0x490>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x9b4 0x9cc (DW_OP_fbreg 0x0) lexblock:__sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:130
│
│ __sysreg_restore_el1_state:131.1 (sysreg-sr.h) Sbepe ║}
~ └>000009cc: f9409bfd ldr x29, [sp, #304] <- 000009c8(b)<__sysreg_restore_el1_state+0x490>
~ 000009d0: 910503ff add sp, sp, #0x140
00000544 CFA:r31+320 r29:c-16
~ 000009d4: d65f03c0 ret
-ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x53c 0x9d8 (DW_OP_fbreg 0xc0) __sysreg_restore_el1_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:74
**000009d8 <__sysreg_restore_common_state>:
+ __sysreg_restore_common_state params:
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x9d8 0xa04 (DW_OP_fbreg 0x8)
__sysreg_restore_common_state:64.0 (sysreg-sr.h) Sbepe ║{
000009d8 CFA:r31
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x9d8 0xa04 (DW_OP_fbreg 0x8) __sysreg_restore_common_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:63
~ 000009d8: d10043ff sub sp, sp, #0x10 <- 0000051c(bl)<__sysreg_restore_common_state>
~ 000009dc: f90007e0 str x0, [sp, #8]
__sysreg_restore_common_state:65.2 (sysreg-sr.h) SbePe ║write_sysreg(ctxt_sys_reg(ctxt, MDSCR_EL1), mdscr_el1);
~ ┌─000009e0: 14000001 b 9e4 <__sysreg_restore_common_state+0xc>
│
│ __sysreg_restore_common_state:65.2 (sysreg-sr.h) sbepe ║write_sysreg(ctxt_sys_reg(ctxt, MDSCR_EL1), mdscr_el1);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x9e4 0x9fc (DW_OP_fbreg 0x0) lexblock:__sysreg_restore_common_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:65
~ └>000009e4: f94007e8 ldr x8, [sp, #8] <- 000009e0(b)<__sysreg_restore_common_state+0xc>
~ 000009e8: f941fd08 ldr x8, [x8, #1016]
~ 000009ec: f90003e8 str x8, [sp]
~ 000009f0: f94003e8 ldr x8, [sp]
~ 000009f4: d5100248 msr mdscr_el1, x8
~ ┌─000009f8: 14000001 b 9fc <__sysreg_restore_common_state+0x24>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x9e4 0x9fc (DW_OP_fbreg 0x0) lexblock:__sysreg_restore_common_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:65
│
│ __sysreg_restore_common_state:66.1 (sysreg-sr.h) Sbepe ║}
~ └>000009fc: 910043ff add sp, sp, #0x10 <- 000009f8(b)<__sysreg_restore_common_state+0x24>
000009dc CFA:r31+16
~ 00000a00: d65f03c0 ret
-ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0x9d8 0xa04 (DW_OP_fbreg 0x8) __sysreg_restore_common_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:63
**00000a04 <__sysreg_restore_user_state>:
+ __sysreg_restore_user_state params:
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0xa04 0xa4c (DW_OP_fbreg 0x18)
__sysreg_restore_user_state:69.0 (sysreg-sr.h) Sbepe ║{
00000a04 CFA:r31
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0xa04 0xa4c (DW_OP_fbreg 0x18) __sysreg_restore_user_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:68
~ 00000a04: d10083ff sub sp, sp, #0x20 <- 00000524(bl)<__sysreg_restore_user_state>
~ 00000a08: f9000fe0 str x0, [sp, #24]
__sysreg_restore_user_state:70.2 (sysreg-sr.h) SbePe ║write_sysreg(ctxt_sys_reg(ctxt, TPIDR_EL0), tpidr_el0);
~ ┌─00000a0c: 14000001 b a10 <__sysreg_restore_user_state+0xc>
│
│ __sysreg_restore_user_state:70.2 (sysreg-sr.h) sbepe ║write_sysreg(ctxt_sys_reg(ctxt, TPIDR_EL0), tpidr_el0);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0xa10 0xa28 (DW_OP_fbreg 0x10) lexblock:__sysreg_restore_user_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:70
~ └>00000a10: f9400fe8 ldr x8, [sp, #24] <- 00000a0c(b)<__sysreg_restore_user_state+0xc>
~ 00000a14: f941e508 ldr x8, [x8, #968]
~ 00000a18: f9000be8 str x8, [sp, #16]
~ 00000a1c: f9400be8 ldr x8, [sp, #16]
~ 00000a20: d51bd048 msr tpidr_el0, x8
~ ┌─00000a24: 14000001 b a28 <__sysreg_restore_user_state+0x24>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0xa10 0xa28 (DW_OP_fbreg 0x10) lexblock:__sysreg_restore_user_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:70
│
│ __sysreg_restore_user_state:71.2 (sysreg-sr.h) Sbepe ║write_sysreg(ctxt_sys_reg(ctxt, TPIDRRO_EL0), tpidrro_el0);
~ ┌─└>00000a28: 14000001 b a2c <__sysreg_restore_user_state+0x28> <- 00000a24(b)<__sysreg_restore_user_state+0x24>
│
│ __sysreg_restore_user_state:71.2 (sysreg-sr.h) sbepe ║write_sysreg(ctxt_sys_reg(ctxt, TPIDRRO_EL0), tpidrro_el0);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0xa2c 0xa44 (DW_OP_fbreg 0x8) lexblock:__sysreg_restore_user_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:71
~ └──>00000a2c: f9400fe8 ldr x8, [sp, #24] <- 00000a28(b)<__sysreg_restore_user_state+0x28>
~ 00000a30: f941e908 ldr x8, [x8, #976]
~ 00000a34: f90007e8 str x8, [sp, #8]
~ 00000a38: f94007e8 ldr x8, [sp, #8]
~ 00000a3c: d51bd068 msr tpidrro_el0, x8
~ ┌─00000a40: 14000001 b a44 <__sysreg_restore_user_state+0x40>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0xa2c 0xa44 (DW_OP_fbreg 0x8) lexblock:__sysreg_restore_user_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:71
│
│ __sysreg_restore_user_state:72.1 (sysreg-sr.h) Sbepe ║}
~ └>00000a44: 910083ff add sp, sp, #0x20 <- 00000a40(b)<__sysreg_restore_user_state+0x40>
00000a08 CFA:r31+32
~ 00000a48: d65f03c0 ret
-ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0xa04 0xa4c (DW_OP_fbreg 0x18) __sysreg_restore_user_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:68
**00000a4c <__sysreg_restore_el2_return_state>:
+ __sysreg_restore_el2_return_state params:
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0xa4c 0xbb4 (DW_OP_fbreg 0x28)
__sysreg_restore_el2_return_state:134.0 (sysreg-sr.h) Sbepe ║{
00000a4c CFA:r31
+ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0xa4c 0xbb4 (DW_OP_fbreg 0x28) __sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:133
+pstate var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0xa4c 0xbb4 (DW_OP_fbreg 0x20) __sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:135
+mode var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0xa4c 0xbb4 (DW_OP_fbreg 0x18) __sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:136
~ 00000a4c: d10183ff sub sp, sp, #0x60 <- 0000052c(bl)<__sysreg_restore_el2_return_state>
~ 00000a50: f90017e0 str x0, [sp, #40]
__sysreg_restore_el2_return_state:135.15 (sysreg-sr.h) SbePe u64 pstate = ║ctxt->regs.pstate;
~ 00000a54: f94017e8 ldr x8, [sp, #40]
__sysreg_restore_el2_return_state:135.26 (sysreg-sr.h) sbepe u64 pstate = ctxt->regs.║pstate;
~ 00000a58: f9408508 ldr x8, [x8, #264]
__sysreg_restore_el2_return_state:135.6 (sysreg-sr.h) sbepe u64 ║pstate = ctxt->regs.pstate;
~ 00000a5c: f90013e8 str x8, [sp, #32]
__sysreg_restore_el2_return_state:136.13 (sysreg-sr.h) Sbepe u64 mode = ║pstate & PSR_AA32_MODE_MASK;
~ 00000a60: f94013e8 ldr x8, [sp, #32]
__sysreg_restore_el2_return_state:136.20 (sysreg-sr.h) sbepe u64 mode = pstate ║& PSR_AA32_MODE_MASK;
~ 00000a64: 92401108 and x8, x8, #0x1f
__sysreg_restore_el2_return_state:136.6 (sysreg-sr.h) sbepe u64 ║mode = pstate & PSR_AA32_MODE_MASK;
~ 00000a68: f9000fe8 str x8, [sp, #24]
__sysreg_restore_el2_return_state:149.31 (sysreg-sr.h) Sbepe if (!(mode & PSR_MODE32_BIT) ║&& mode >= PSR_MODE_EL2t)
~ 00000a6c: 394063e9 ldrb w9, [sp, #24]
~ ┌───────00000a70: 37200169 tbnz w9, #4, a9c <__sysreg_restore_el2_return_state+0x50>
│
~ │ ┌─00000a74: 14000001 b a78 <__sysreg_restore_el2_return_state+0x2c> <- 00000a70(b.cc-succ)<fallthrough>
│ │
│ │ __sysreg_restore_el2_return_state:149.34 (sysreg-sr.h) sbepe if (!(mode & PSR_MODE32_BIT) && ║mode >= PSR_MODE_EL2t)
~ │ └>00000a78: f9400fe8 ldr x8, [sp, #24] <- 00000a74(b)<__sysreg_restore_el2_return_state+0x2c>
│ __sysreg_restore_el2_return_state:149.6 (sysreg-sr.h) sbepe if (║!(mode & PSR_MODE32_BIT) && mode >= PSR_MODE_EL2t)
~ │ 00000a7c: f1002108 subs x8, x8, #0x8
~ │ ┌─────00000a80: 540000e3 b.cc a9c <__sysreg_restore_el2_return_state+0x50> // b.lo, b.ul, b.last
│ │
~ │ │ ┌─00000a84: 14000001 b a88 <__sysreg_restore_el2_return_state+0x3c> <- 00000a80(b.cc-succ)<fallthrough>
│ │ │
~ │ │ └>00000a88: 52800128 mov w8, #0x9 // #9 <- 00000a84(b)<__sysreg_restore_el2_return_state+0x3c>
~ │ │ 00000a8c: 72a00208 movk w8, #0x10, lsl #16
~ │ │ 00000a90: 2a0803e9 mov w9, w8
│ │ __sysreg_restore_el2_return_state:150.10 (sysreg-sr.h) Sbepe pstate ║= PSR_MODE_EL2h | PSR_IL_BIT;
~ │ │ 00000a94: f90013e9 str x9, [sp, #32]
│ │ __sysreg_restore_el2_return_state:150.3 (sysreg-sr.h) sbepe ║pstate = PSR_MODE_EL2h | PSR_IL_BIT;
~ │ │ ┌─00000a98: 14000001 b a9c <__sysreg_restore_el2_return_state+0x50>
│ │ │
│ │ │ __sysreg_restore_el2_return_state:152.2 (sysreg-sr.h) Sbepe ║write_sysreg_el2(ctxt->regs.pc, SYS_ELR);
~ └>└>┌─└>00000a9c: 14000001 b aa0 <__sysreg_restore_el2_return_state+0x54> <- 00000a70(b.cc)<__sysreg_restore_el2_return_state+0x50>,00000a80(b.cc)<__sysreg_restore_el2_return_state+0x50>,00000a98(b)<__sysreg_restore_el2_return_state+0x50>
│
│ __sysreg_restore_el2_return_state:152.2 (sysreg-sr.h) sbepe ║write_sysreg_el2(ctxt->regs.pc, SYS_ELR);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0xaa0 0xab8 (DW_OP_fbreg 0x10) lexblock:__sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:152
~ └──>00000aa0: f94017e8 ldr x8, [sp, #40] <- 00000a9c(b)<__sysreg_restore_el2_return_state+0x54>
~ 00000aa4: f9408108 ldr x8, [x8, #256]
~ 00000aa8: f9000be8 str x8, [sp, #16]
~ 00000aac: f9400be8 ldr x8, [sp, #16]
~ 00000ab0: d51c4028 msr elr_el2, x8
~ ┌─00000ab4: 14000001 b ab8 <__sysreg_restore_el2_return_state+0x6c>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0xaa0 0xab8 (DW_OP_fbreg 0x10) lexblock:__sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:152
│
│ __sysreg_restore_el2_return_state:153.2 (sysreg-sr.h) Sbepe ║write_sysreg_el2(pstate, SYS_SPSR);
~ ┌─└>00000ab8: 14000001 b abc <__sysreg_restore_el2_return_state+0x70> <- 00000ab4(b)<__sysreg_restore_el2_return_state+0x6c>
│
│ __sysreg_restore_el2_return_state:153.2 (sysreg-sr.h) sbepe ║write_sysreg_el2(pstate, SYS_SPSR);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0xabc 0xad0 (DW_OP_fbreg 0x8) lexblock:__sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:153
~ └──>00000abc: f94013e8 ldr x8, [sp, #32] <- 00000ab8(b)<__sysreg_restore_el2_return_state+0x70>
~ 00000ac0: f90007e8 str x8, [sp, #8]
~ 00000ac4: f94007e8 ldr x8, [sp, #8]
~ 00000ac8: d51c4008 msr spsr_el2, x8
~ ┌─00000acc: 14000001 b ad0 <__sysreg_restore_el2_return_state+0x84>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0xabc 0xad0 (DW_OP_fbreg 0x8) lexblock:__sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:153
│
~ └>00000ad0: 52800328 mov w8, #0x19 // #25 <- 00000acc(b)<__sysreg_restore_el2_return_state+0x84>
~ 00000ad4: b90033e8 str w8, [sp, #48]
z: 0xad8 0xb80 cpus_have_final_cap inlined from __sysreg_restore_el2_return_state:155 (sysreg-sr.h) <f3ca>:
a: 0xad8 0xb00 system_capabilities_finalized inlined from cpus_have_final_cap:459 (cpufeature.h) <f3e6>:<f3ca>:
za system_capabilities_finalized:419.9 (cpufeature.h) Sbepe return ║static_branch_likely(&arm64_const_caps_ready);
+num param int (base type, DW_ATE_signed size:4) 0xad8 0xb80 (DW_OP_fbreg 0x30) cpus_have_final_cap(inlined):__sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
+branch var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0xad8 0xb00 (DW_OP_fbreg 0x44) lexblock:system_capabilities_finalized(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
~za 00000ad8: f00000c9 adrp x9, 1b000 <hyp_memory+0x460>
~za 00000adc: b9479928 ldr w8, [x9, #1944]
~za 00000ae0: 71000108 subs w8, w8, #0x0
~za 00000ae4: 1a9f07ea cset w10, ne // ne = any
~za 00000ae8: 390113ea strb w10, [sp, #68]
za system_capabilities_finalized:419.9 (cpufeature.h) sbepe return ║static_branch_likely(&arm64_const_caps_ready);
~za 00000aec: 394113ea ldrb w10, [sp, #68]
~za 00000af0: 2a0a03e9 mov w9, w10
~za 00000af4: 92400129 and x9, x9, #0x1
za system_capabilities_finalized:419.9 (cpufeature.h) sbepe return ║static_branch_likely(&arm64_const_caps_ready);
~za 00000af8: f9001fe9 str x9, [sp, #56]
za system_capabilities_finalized:419.9 (cpufeature.h) sbepe return ║static_branch_likely(&arm64_const_caps_ready);
~za 00000afc: f9401fe9 ldr x9, [sp, #56]
-branch var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0xad8 0xb00 (DW_OP_fbreg 0x44) lexblock:system_capabilities_finalized(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
z cpus_have_final_cap:459.6 (cpufeature.h) Sbepe if (║system_capabilities_finalized())
~z ┌────00000b00: b4000389 cbz x9, b70 <__sysreg_restore_el2_return_state+0x124>
│
~z │ ┌─00000b04: 14000001 b b08 <__sysreg_restore_el2_return_state+0xbc> <- 00000b00(b.cc-succ)<fallthrough>
│ │
z │ │ cpus_have_final_cap:460.32 (cpufeature.h) Sbepe return __cpus_have_const_cap(║num);
~z │ └>00000b08: b94033e8 ldr w8, [sp, #48] <- 00000b04(b)<__sysreg_restore_el2_return_state+0xbc>
~z │ 00000b0c: b9005be8 str w8, [sp, #88]
b: 0xb10 0xb70 (0 of 2) __cpus_have_const_cap inlined from cpus_have_final_cap:460 (cpufeature.h) <f413>:<f3ca>:
zb │ __cpus_have_const_cap:444.6 (cpufeature.h) Sbepe if (║num >= ARM64_NCAPS)
+num param int (base type, DW_ATE_signed size:4) 0xb10 0xb70 (DW_OP_fbreg 0x58) __cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
~zb │ 00000b10: b9405be8 ldr w8, [sp, #88]
zb │ __cpus_have_const_cap:444.6 (cpufeature.h) sbepe if (║num >= ARM64_NCAPS)
~zb │ 00000b14: 7100f508 subs w8, w8, #0x3d
~zb │ ┌──00000b18: 540000ab b.lt b2c <__sysreg_restore_el2_return_state+0xe0> // b.tstop
│ │
~zb │ │┌─00000b1c: 14000001 b b20 <__sysreg_restore_el2_return_state+0xd4> <- 00000b18(b.cc-succ)<fallthrough>
│ ││
~zb │ │└>00000b20: 2a1f03e8 mov w8, wzr <- 00000b1c(b)<__sysreg_restore_el2_return_state+0xd4>
zb │ │ __cpus_have_const_cap:445.3 (cpufeature.h) Sbepe ║return false;
~zb │ │ 00000b24: 39017fe8 strb w8, [sp, #95]
~zb │┌┼──00000b28: 14000013 b b74 <__sysreg_restore_el2_return_state+0x128>
│││
zb │││ __cpus_have_const_cap:446.9 (cpufeature.h) Sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
+branch var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0xb2c 0xb60 (DW_OP_fbreg 0x54) lexblock:__cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
~zb ││└─>00000b2c: b9805be8 ldrsw x8, [sp, #88] <- 00000b18(b.cc)<__sysreg_restore_el2_return_state+0xe0>
~zb ││ 00000b30: d37ced08 lsl x8, x8, #4
~zb ││ 00000b34: f00000c9 adrp x9, 1b000 <hyp_memory+0x460>
~zb ││ 00000b38: 911e8129 add x9, x9, #0x7a0
~zb ││ 00000b3c: b868692a ldr w10, [x9, x8]
~zb ││ 00000b40: 7100014a subs w10, w10, #0x0
~zb ││ 00000b44: 1a9f07eb cset w11, ne // ne = any
~zb ││ 00000b48: 390153eb strb w11, [sp, #84]
zb ││ __cpus_have_const_cap:446.9 (cpufeature.h) sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
~zb ││ 00000b4c: 394153eb ldrb w11, [sp, #84]
~zb ││ 00000b50: 2a0b03e8 mov w8, w11
~zb ││ 00000b54: 92400108 and x8, x8, #0x1
zb ││ __cpus_have_const_cap:446.9 (cpufeature.h) sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
~zb ││ 00000b58: f90027e8 str x8, [sp, #72]
zb ││ __cpus_have_const_cap:446.9 (cpufeature.h) sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
~zb ││ 00000b5c: f94027e8 ldr x8, [sp, #72]
-branch var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0xb2c 0xb60 (DW_OP_fbreg 0x54) lexblock:__cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
zb ││ __cpus_have_const_cap:446.9 (cpufeature.h) sbepe return ║static_branch_unlikely(&cpu_hwcap_keys[num]);
~zb ││ 00000b60: f1000108 subs x8, x8, #0x0
~zb ││ 00000b64: 1a9f07eb cset w11, ne // ne = any
zb ││ __cpus_have_const_cap:446.2 (cpufeature.h) sbepe ║return static_branch_unlikely(&cpu_hwcap_keys[num]);
~zb ││ 00000b68: 39017feb strb w11, [sp, #95]
~zb ││ ┌─00000b6c: 14000002 b b74 <__sysreg_restore_el2_return_state+0x128>
-num param int (base type, DW_ATE_signed size:4) 0xb10 0xb70 (DW_OP_fbreg 0x58) __cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
││ │
z ││ │ cpus_have_final_cap:462.3 (cpufeature.h) Sbepe ║BUG();
~z └┼─┼>00000b70: d4210000 brk #0x800 <- 00000b00(b.cc)<__sysreg_restore_el2_return_state+0x124>
│ │
c: 0xb74 0xb78 (1 of 2) __cpus_have_const_cap inlined from cpus_have_final_cap:460 (cpufeature.h) <f413>:<f3ca>:
zc │ │ __cpus_have_const_cap:447.1 (cpufeature.h) Sbepe ║}
+num param int (base type, DW_ATE_signed size:4) 0xb74 0xb78 (DW_OP_fbreg 0x58) __cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
~zc └>└>00000b74: 39417fe8 ldrb w8, [sp, #95] <- 00000b28(b)<__sysreg_restore_el2_return_state+0x128>,00000b6c(b)<__sysreg_restore_el2_return_state+0x128>
-num param int (base type, DW_ATE_signed size:4) 0xb74 0xb78 (DW_OP_fbreg 0x58) __cpus_have_const_cap(inlined):cpus_have_final_cap(inlined):__sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
z cpus_have_final_cap:460.3 (cpufeature.h) Sbepe ║return __cpus_have_const_cap(num);
~z 00000b78: 3900dfe8 strb w8, [sp, #55]
z cpus_have_final_cap:463.1 (cpufeature.h) Sbepe ║}
~z 00000b7c: 3940dfe8 ldrb w8, [sp, #55]
-num param int (base type, DW_ATE_signed size:4) 0xad8 0xb80 (DW_OP_fbreg 0x30) cpus_have_final_cap(inlined):__sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c
__sysreg_restore_el2_return_state:155.6 (sysreg-sr.h) Sbepe if (║cpus_have_final_cap(ARM64_HAS_RAS_EXTN))
~ 00000b80: 71000508 subs w8, w8, #0x1
~ ┌─────00000b84: 54000141 b.ne bac <__sysreg_restore_el2_return_state+0x160> // b.any
│
~ │ ┌─00000b88: 14000001 b b8c <__sysreg_restore_el2_return_state+0x140> <- 00000b84(b.cc-succ)<fallthrough>
│ │
│ │ __sysreg_restore_el2_return_state:156.3 (sysreg-sr.h) Sbepe ║write_sysreg_s(ctxt_sys_reg(ctxt, DISR_EL1), SYS_VDISR_EL2);
~ │ ┌─└>00000b8c: 14000001 b b90 <__sysreg_restore_el2_return_state+0x144> <- 00000b88(b)<__sysreg_restore_el2_return_state+0x140>
│ │
│ │ __sysreg_restore_el2_return_state:156.3 (sysreg-sr.h) sbepe ║write_sysreg_s(ctxt_sys_reg(ctxt, DISR_EL1), SYS_VDISR_EL2);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0xb90 0xbac (DW_OP_fbreg 0x0) lexblock:__sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:156
~ │ └──>00000b90: f94017e8 ldr x8, [sp, #40] <- 00000b8c(b)<__sysreg_restore_el2_return_state+0x144>
~ │ 00000b94: f9420508 ldr x8, [x8, #1032]
~ │ 00000b98: f90003e8 str x8, [sp]
~ │ 00000b9c: f94003e8 ldr x8, [sp]
~ │ 00000ba0: d51cc128 msr vdisr_el2, x8
~ │ ┌─00000ba4: 14000001 b ba8 <__sysreg_restore_el2_return_state+0x15c>
│ │
~ │ ┌─└>00000ba8: 14000001 b bac <__sysreg_restore_el2_return_state+0x160> <- 00000ba4(b)<__sysreg_restore_el2_return_state+0x15c>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0xb90 0xbac (DW_OP_fbreg 0x0) lexblock:__sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:156
│ │
│ │ __sysreg_restore_el2_return_state:157.1 (sysreg-sr.h) Sbepe ║}
~ └>└──>00000bac: 910183ff add sp, sp, #0x60 <- 00000b84(b.cc)<__sysreg_restore_el2_return_state+0x160>,00000ba8(b)<__sysreg_restore_el2_return_state+0x160>
~ 00000bb0: d65f03c0 ret
-ctxt param pointer(struct kvm_cpu_context<e53f>/<f464>) 0xa4c 0xbb4 (DW_OP_fbreg 0x28) __sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:133
-pstate var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0xa4c 0xbb4 (DW_OP_fbreg 0x20) __sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:135
-mode var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0xa4c 0xbb4 (DW_OP_fbreg 0x18) __sysreg_restore_el2_return_state:arch/arm64/kvm/hyp/nvhe/sysreg-sr.c:136
~ 00000bb4: d53d1008 mrs x8, sctlr_el12
~ 00000bb8: d53d1048 mrs x8, cpacr_el12
~ 00000bbc: d53d2008 mrs x8, ttbr0_el12
~ 00000bc0: d53d2028 mrs x8, ttbr1_el12
~ 00000bc4: d53d2048 mrs x8, tcr_el12
~ 00000bc8: d53d5208 mrs x8, esr_el12
~ 00000bcc: d53d5108 mrs x8, afsr0_el12
~ 00000bd0: d53d5128 mrs x8, afsr1_el12
~ 00000bd4: d53d6008 mrs x8, far_el12
~ 00000bd8: d53da208 mrs x8, mair_el12
~ 00000bdc: d53dc008 mrs x8, vbar_el12
~ 00000be0: d53dd028 mrs x8, contextidr_el12
~ 00000be4: d53da308 mrs x8, amair_el12
~ 00000be8: d53de108 mrs x8, cntkctl_el12
~ 00000bec: d5033fbf dmb sy
~ 00000bf0: d5033fbf dmb sy
~ 00000bf4: d53d4028 mrs x8, elr_el12
~ 00000bf8: d53d4008 mrs x8, spsr_el12
~ 00000bfc: d5384028 mrs x8, elr_el1
~ 00000c00: d5384008 mrs x8, spsr_el1
~ 00000c04: d51d1008 msr sctlr_el12, x8
~ 00000c08: d51d2048 msr tcr_el12, x8
~ 00000c0c: d51d2048 msr tcr_el12, x8
~ 00000c10: d51d1048 msr cpacr_el12, x8
~ 00000c14: d51d2008 msr ttbr0_el12, x8
~ 00000c18: d51d2028 msr ttbr1_el12, x8
~ 00000c1c: d51d5208 msr esr_el12, x8
~ 00000c20: d51d5108 msr afsr0_el12, x8
~ 00000c24: d51d5128 msr afsr1_el12, x8
~ 00000c28: d51d6008 msr far_el12, x8
~ 00000c2c: d51da208 msr mair_el12, x8
~ 00000c30: d51dc008 msr vbar_el12, x8
~ 00000c34: d51dd028 msr contextidr_el12, x8
~ 00000c38: d51da308 msr amair_el12, x8
~ 00000c3c: d51de108 msr cntkctl_el12, x8
~ 00000c40: d51d1008 msr sctlr_el12, x8
~ 00000c44: d51d2048 msr tcr_el12, x8
~ 00000c48: d51d4028 msr elr_el12, x8
~ 00000c4c: d51d4008 msr spsr_el12, x8
~ 00000c50: d5184028 msr elr_el1, x8
00000a50 CFA:r31+96
~ 00000c54: d5184008 msr spsr_el1, x8