Key: ELF symbol (primary) ELF symbol source (with column ║) frame instruction +variable (range start) -variable (range end) inlining control-flow forwards branch ──> backwards branch ══>Compilation unit 00012810 00013778 arch/arm64/kvm/hyp/nvhe/../exception.c
instructions
header
.debug_abbrev die abbreviation table
.debug_info die tree
.debug_line line number info
.debug_line evaluated line info
simple die tree
simple die tree globals
simple die tree locals
inlined subroutine info
inlined subroutine info by range
**00012810 <kvm_inject_exception>:
00012810 <$x>:
+ kvm_inject_exception params:
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x12810 0x128f8 (DW_OP_breg31 0x10)
kvm_inject_exception:300.0 (exception.c) Sbepe ║{
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x12810 0x128f8 (DW_OP_breg31 0x10) kvm_inject_exception:arch/arm64/kvm/hyp/nvhe/../exception.c:299
~ 00012810: d100c3ff sub sp, sp, #0x30 <- 000028fc(bl)<kvm_inject_exception>
~ 00012814: a9027bfd stp x29, x30, [sp, #32]
00012810 CFA:r31 r29:u r30:u
~ 00012818: 910083fd add x29, sp, #0x20
~ 0001281c: f9000be0 str x0, [sp, #16]
kvm_inject_exception:301.24 (exception.c) SbePe if (vcpu_el1_is_32bit(║vcpu)) {
~ 00012820: f9400be8 ldr x8, [sp, #16]
~ 00012824: f81f83a8 stur x8, [x29, #-8]
a: 0x12828 0x1282c vcpu_el1_is_32bit inlined from kvm_inject_exception:301 (exception.c) <d65fe>:
a vcpu_el1_is_32bit:46.11 (kvm_emulate.h) Sbepe return !(║vcpu->arch.hcr_el2 & HCR_RW);
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x12828 0x1282c (DW_OP_fbreg -0x8) vcpu_el1_is_32bit(inlined):kvm_inject_exception:arch/arm64/kvm/hyp/nvhe/../exception.c
~a 00012828: f85f83a8 ldur x8, [x29, #-8]
-vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x12828 0x1282c (DW_OP_fbreg -0x8) vcpu_el1_is_32bit(inlined):kvm_inject_exception:arch/arm64/kvm/hyp/nvhe/../exception.c
kvm_inject_exception:301.6 (exception.c) Sbepe if (║vcpu_el1_is_32bit(vcpu)) {
~ 0001282c: 3961ed09 ldrb w9, [x8, #2171]
~ ┌────────00012830: 37380449 tbnz w9, #7, 128b8 <kvm_inject_exception+0xa8>
│
~ │ ┌─00012834: 14000001 b 12838 <kvm_inject_exception+0x28> <- 00012830(b.cc-succ)<fallthrough>
│ │
│ │ kvm_inject_exception:302.11 (exception.c) Sbepe switch (║vcpu->arch.flags & KVM_ARM64_EXCEPT_MASK) {
~ │ └>00012838: f9400be8 ldr x8, [sp, #16] <- 00012834(b)<kvm_inject_exception+0x28>
│ kvm_inject_exception:302.22 (exception.c) sbepe switch (vcpu->arch.║flags & KVM_ARM64_EXCEPT_MASK) {
~ │ 0001283c: f9445908 ldr x8, [x8, #2224]
│ kvm_inject_exception:302.28 (exception.c) sbepe switch (vcpu->arch.flags ║& KVM_ARM64_EXCEPT_MASK) {
~ │ 00012840: 92770908 and x8, x8, #0xe00
│ kvm_inject_exception:302.3 (exception.c) sbepe ║switch (vcpu->arch.flags & KVM_ARM64_EXCEPT_MASK) {
~ │ 00012844: aa0803e9 mov x9, x8
~ │ 00012848: f90007e9 str x9, [sp, #8]
~ │ ┌──0001284c: b4000148 cbz x8, 12874 <kvm_inject_exception+0x64>
│ │
~ │ │┌─00012850: 14000001 b 12854 <kvm_inject_exception+0x44> <- 0001284c(b.cc-succ)<fallthrough>
│ ││
~ │ │└>00012854: f94007e8 ldr x8, [sp, #8] <- 00012850(b)<kvm_inject_exception+0x44>
│ │ kvm_inject_exception:302.3 (exception.c) sbepe ║switch (vcpu->arch.flags & KVM_ARM64_EXCEPT_MASK) {
~ │ │ 00012858: f1080109 subs x9, x8, #0x200
~ │ ┌┼──0001285c: 54000160 b.eq 12888 <kvm_inject_exception+0x78> // b.none
│ ││
~ │ ││┌─00012860: 14000001 b 12864 <kvm_inject_exception+0x54> <- 0001285c(b.cc-succ)<fallthrough>
│ │││
~ │ ││└>00012864: f94007e8 ldr x8, [sp, #8] <- 00012860(b)<kvm_inject_exception+0x54>
│ ││ kvm_inject_exception:302.3 (exception.c) sbepe ║switch (vcpu->arch.flags & KVM_ARM64_EXCEPT_MASK) {
~ │ ││ 00012868: f1100109 subs x9, x8, #0x400
~ │ ││┌─0001286c: 54000180 b.eq 1289c <kvm_inject_exception+0x8c> // b.none
│ │││
~ │ ┌┼┼┼─00012870: 14000010 b 128b0 <kvm_inject_exception+0xa0> <- 0001286c(b.cc-succ)<fallthrough>
│ ││││
│ ││││ kvm_inject_exception:304.22 (exception.c) Sbepe enter_exception32(║vcpu, PSR_AA32_MODE_UND, 4);
~ │ ││└┼>00012874: f9400be0 ldr x0, [sp, #16] <- 0001284c(b.cc)<kvm_inject_exception+0x64>
~ │ ││ │ 00012878: 52800361 mov w1, #0x1b // #27
~ │ ││ │ 0001287c: 52800082 mov w2, #0x4 // #4
│ ││ │ kvm_inject_exception:304.4 (exception.c) sbepe ║enter_exception32(vcpu, PSR_AA32_MODE_UND, 4);
~ │ ││ │ 00012880: 9400001e bl 128f8 <enter_exception32>
│ ││ │
│ ││ │ kvm_inject_exception:305.4 (exception.c) Sbepe ║break;
~ │┌──┼┼─┼─00012884: 1400000c b 128b4 <kvm_inject_exception+0xa4> <- 00012880(bl-succ)<return>
││ ││ │
││ ││ │ kvm_inject_exception:307.22 (exception.c) Sbepe enter_exception32(║vcpu, PSR_AA32_MODE_ABT, 12);
~ ││ │└─┼>00012888: f9400be0 ldr x0, [sp, #16] <- 0001285c(b.cc)<kvm_inject_exception+0x78>
~ ││ │ │ 0001288c: 528002e1 mov w1, #0x17 // #23
~ ││ │ │ 00012890: 52800182 mov w2, #0xc // #12
││ │ │ kvm_inject_exception:307.4 (exception.c) sbepe ║enter_exception32(vcpu, PSR_AA32_MODE_ABT, 12);
~ ││ │ │ 00012894: 94000019 bl 128f8 <enter_exception32>
││ │ │
││ │ │ kvm_inject_exception:308.4 (exception.c) Sbepe ║break;
~ ││ ┌┼──┼─00012898: 14000007 b 128b4 <kvm_inject_exception+0xa4> <- 00012894(bl-succ)<return>
││ ││ │
││ ││ │ kvm_inject_exception:310.22 (exception.c) Sbepe enter_exception32(║vcpu, PSR_AA32_MODE_ABT, 16);
~ ││ ││ └>0001289c: f9400be0 ldr x0, [sp, #16] <- 0001286c(b.cc)<kvm_inject_exception+0x8c>
~ ││ ││ 000128a0: 528002e1 mov w1, #0x17 // #23
~ ││ ││ 000128a4: 52800202 mov w2, #0x10 // #16
││ ││ kvm_inject_exception:310.4 (exception.c) sbepe ║enter_exception32(vcpu, PSR_AA32_MODE_ABT, 16);
~ ││ ││ 000128a8: 94000014 bl 128f8 <enter_exception32>
││ ││
││ ││ kvm_inject_exception:311.4 (exception.c) Sbepe ║break;
~ ││ ││┌───000128ac: 14000002 b 128b4 <kvm_inject_exception+0xa4> <- 000128a8(bl-succ)<return>
││ │││
││ │││ kvm_inject_exception:314.4 (exception.c) Sbepe ║break;
~ ││ │└┼>┌─000128b0: 14000001 b 128b4 <kvm_inject_exception+0xa4> <- 00012870(b)<kvm_inject_exception+0xa0>
││ │ │ │
││ │ │ │ kvm_inject_exception:316.2 (exception.c) Sbepe ║} else {
~ ┌┼└>└>└>└>000128b4: 1400000e b 128ec <kvm_inject_exception+0xdc> <- 00012884(b)<kvm_inject_exception+0xa4>,00012898(b)<kvm_inject_exception+0xa4>,000128ac(b)<kvm_inject_exception+0xa4>,000128b0(b)<kvm_inject_exception+0xa4>
││
││ kvm_inject_exception:317.11 (exception.c) Sbepe switch (║vcpu->arch.flags & KVM_ARM64_EXCEPT_MASK) {
~ │└───────>000128b8: f9400be8 ldr x8, [sp, #16] <- 00012830(b.cc)<kvm_inject_exception+0xa8>
│ kvm_inject_exception:317.3 (exception.c) sbepe ║switch (vcpu->arch.flags & KVM_ARM64_EXCEPT_MASK) {
~ │ 000128bc: 3962c509 ldrb w9, [x8, #2225]
~ │ 000128c0: 121f0929 and w9, w9, #0xe
~ │ ┌───000128c4: 35000109 cbnz w9, 128e4 <kvm_inject_exception+0xd4>
│ │
~ │ │ ┌─000128c8: 14000001 b 128cc <kvm_inject_exception+0xbc> <- 000128c4(b.cc-succ)<fallthrough>
│ │ │
│ │ │ kvm_inject_exception:320.22 (exception.c) Sbepe enter_exception64(║vcpu, PSR_MODE_EL1h, except_type_sync);
~ │ │ └>000128cc: f9400be0 ldr x0, [sp, #16] <- 000128c8(b)<kvm_inject_exception+0xbc>
~ │ │ 000128d0: 528000a8 mov w8, #0x5 // #5
~ │ │ 000128d4: 2a0803e1 mov w1, w8
~ │ │ 000128d8: 2a1f03e2 mov w2, wzr
│ │ kvm_inject_exception:320.4 (exception.c) sbepe ║enter_exception64(vcpu, PSR_MODE_EL1h, except_type_sync);
~ │ │ 000128dc: 94000071 bl 12aa0 <enter_exception64>
│ │
│ │ kvm_inject_exception:321.4 (exception.c) Sbepe ║break;
~ │ ┌─┼───000128e0: 14000002 b 128e8 <kvm_inject_exception+0xd8> <- 000128dc(bl-succ)<return>
│ │ │
│ │ │ kvm_inject_exception:328.4 (exception.c) Sbepe ║break;
~ │ │ └>┌─000128e4: 14000001 b 128e8 <kvm_inject_exception+0xd8> <- 000128c4(b.cc)<kvm_inject_exception+0xd4>
│ │ │
~ │ └>┌─└>000128e8: 14000001 b 128ec <kvm_inject_exception+0xdc> <- 000128e0(b)<kvm_inject_exception+0xd8>,000128e4(b)<kvm_inject_exception+0xd8>
│ │
│ │ kvm_inject_exception:331.1 (exception.c) Sbepe ║}
~ └────>└──>000128ec: a9427bfd ldp x29, x30, [sp, #32] <- 000128b4(b)<kvm_inject_exception+0xdc>,000128e8(b)<kvm_inject_exception+0xdc>
~ 000128f0: 9100c3ff add sp, sp, #0x30
0001281c CFA:r29+16 r29:c-16 r30:c-8
~ 000128f4: d65f03c0 ret
-vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x12810 0x128f8 (DW_OP_breg31 0x10) kvm_inject_exception:arch/arm64/kvm/hyp/nvhe/../exception.c:299
**000128f8 <enter_exception32>:
+ enter_exception32 params:
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x128f8 0x12aa0 (DW_OP_fbreg -0x28)
+mode param typedef(u32=typedef(__u32=unsigned int (base type, DW_ATE_unsigned size:4))) 0x128f8 0x12aa0 (DW_OP_fbreg -0x2c)
+vect_offset param typedef(u32=typedef(__u32=unsigned int (base type, DW_ATE_unsigned size:4))) 0x128f8 0x12aa0 (DW_OP_fbreg -0x30)
enter_exception32:267.0 (exception.c) Sbepe ║{
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x128f8 0x12aa0 (DW_OP_fbreg -0x28) enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c:266
+mode param typedef(u32=typedef(__u32=unsigned int (base type, DW_ATE_unsigned size:4))) 0x128f8 0x12aa0 (DW_OP_fbreg -0x2c) enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c:266
+vect_offset param typedef(u32=typedef(__u32=unsigned int (base type, DW_ATE_unsigned size:4))) 0x128f8 0x12aa0 (DW_OP_fbreg -0x30) enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c:266
+spsr var long unsigned int (base type, DW_ATE_unsigned size:8) 0x128f8 0x12aa0 (DW_OP_breg31 0x38) enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c:268
+is_thumb var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0x128f8 0x12aa0 (DW_OP_breg31 0x34) enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c:269
+sctlr var typedef(u32=typedef(__u32=unsigned int (base type, DW_ATE_unsigned size:4))) 0x128f8 0x12aa0 (DW_OP_breg31 0x30) enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c:270
+return_address var typedef(u32=typedef(__u32=unsigned int (base type, DW_ATE_unsigned size:4))) 0x128f8 0x12aa0 (DW_OP_breg31 0x2c) enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c:271
~ 000128f8: d10203ff sub sp, sp, #0x80 <- 00012880(bl)<enter_exception32>,00012894(bl)<enter_exception32>,000128a8(bl)<enter_exception32>
~ 000128fc: a9077bfd stp x29, x30, [sp, #112]
000128f8 CFA:r31 r29:u r30:u
~ 00012900: 9101c3fd add x29, sp, #0x70
~ 00012904: f81d83a0 stur x0, [x29, #-40]
~ 00012908: b81d43a1 stur w1, [x29, #-44]
~ 0001290c: b81d03a2 stur w2, [x29, #-48]
enter_exception32:268.34 (exception.c) SbePe unsigned long spsr = *vcpu_cpsr(║vcpu);
~ 00012910: f85d83a8 ldur x8, [x29, #-40]
~ 00012914: f81e03a8 stur x8, [x29, #-32]
b: 0x12918 0x1291c vcpu_cpsr inlined from enter_exception32:268 (exception.c) <d66d6>:
b vcpu_cpsr:137.27 (kvm_emulate.h) Sbepe return (unsigned long *)&║vcpu_gp_regs(vcpu)->pstate;
+vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12918 0x1291c (DW_OP_fbreg -0x20) vcpu_cpsr(inlined):enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c
~b 00012918: f85e03a8 ldur x8, [x29, #-32]
-vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12918 0x1291c (DW_OP_fbreg -0x20) vcpu_cpsr(inlined):enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c
enter_exception32:268.23 (exception.c) Sbepe unsigned long spsr = ║*vcpu_cpsr(vcpu);
~ 0001291c: f9413508 ldr x8, [x8, #616]
enter_exception32:268.16 (exception.c) sbepe unsigned long ║spsr = *vcpu_cpsr(vcpu);
~ 00012920: f9001fe8 str x8, [sp, #56]
enter_exception32:269.19 (exception.c) Sbepe bool is_thumb = (║spsr & PSR_AA32_T_BIT);
~ 00012924: b9403be9 ldr w9, [sp, #56]
enter_exception32:269.18 (exception.c) sbepe bool is_thumb = ║(spsr & PSR_AA32_T_BIT);
~ 00012928: 53051529 ubfx w9, w9, #5, #1
enter_exception32:269.7 (exception.c) sbepe bool ║is_thumb = (spsr & PSR_AA32_T_BIT);
~ 0001292c: 3900d3e9 strb w9, [sp, #52]
enter_exception32:270.34 (exception.c) Sbepe u32 sctlr = __vcpu_read_sys_reg(║vcpu, SCTLR_EL1);
~ 00012930: f85d83a0 ldur x0, [x29, #-40]
~ 00012934: 52800061 mov w1, #0x3 // #3
enter_exception32:270.14 (exception.c) sbepe u32 sctlr = ║__vcpu_read_sys_reg(vcpu, SCTLR_EL1);
~ 00012938: 940000f4 bl 12d08 <__vcpu_read_sys_reg>
enter_exception32:270.6 (exception.c) sbepe u32 ║sctlr = __vcpu_read_sys_reg(vcpu, SCTLR_EL1);
~ 0001293c: b90033e0 str w0, [sp, #48] <- 00012938(bl-succ)<return>
enter_exception32:273.39 (exception.c) Sbepe *vcpu_cpsr(vcpu) = get_except32_cpsr(║vcpu, mode);
~ 00012940: f85d83a0 ldur x0, [x29, #-40]
enter_exception32:273.45 (exception.c) sbepe *vcpu_cpsr(vcpu) = get_except32_cpsr(vcpu, ║mode);
~ 00012944: b85d43a1 ldur w1, [x29, #-44]
enter_exception32:273.21 (exception.c) sbepe *vcpu_cpsr(vcpu) = ║get_except32_cpsr(vcpu, mode);
~ 00012948: 94000107 bl 12d64 <get_except32_cpsr>
enter_exception32:273.13 (exception.c) sbepe *vcpu_cpsr(║vcpu) = get_except32_cpsr(vcpu, mode);
~ 0001294c: f85d83a8 ldur x8, [x29, #-40] <- 00012948(bl-succ)<return>
~ 00012950: f81f03a8 stur x8, [x29, #-16]
c: 0x12954 0x12958 vcpu_cpsr inlined from enter_exception32:273 (exception.c) <d66f4>:
c vcpu_cpsr:137.27 (kvm_emulate.h) Sbepe return (unsigned long *)&║vcpu_gp_regs(vcpu)->pstate;
+vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12954 0x12958 (DW_OP_fbreg -0x10) vcpu_cpsr(inlined):enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c
~c 00012954: f85f03a8 ldur x8, [x29, #-16]
-vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12954 0x12958 (DW_OP_fbreg -0x10) vcpu_cpsr(inlined):enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c
enter_exception32:273.19 (exception.c) Sbepe *vcpu_cpsr(vcpu) ║= get_except32_cpsr(vcpu, mode);
~ 00012958: f9013500 str x0, [x8, #616]
enter_exception32:274.30 (exception.c) Sbepe return_address = *vcpu_pc(║vcpu);
~ 0001295c: f85d83a8 ldur x8, [x29, #-40]
~ 00012960: f81f83a8 stur x8, [x29, #-8]
d: 0x12964 0x12968 vcpu_pc inlined from enter_exception32:274 (exception.c) <d6712>:
d vcpu_pc:132.27 (kvm_emulate.h) Sbepe return (unsigned long *)&║vcpu_gp_regs(vcpu)->pc;
+vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12964 0x12968 (DW_OP_fbreg -0x8) vcpu_pc(inlined):enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c
~d 00012964: f85f83a8 ldur x8, [x29, #-8]
-vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12964 0x12968 (DW_OP_fbreg -0x8) vcpu_pc(inlined):enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c
enter_exception32:274.21 (exception.c) Sbepe return_address = ║*vcpu_pc(vcpu);
~ 00012968: f9413108 ldr x8, [x8, #608]
enter_exception32:274.19 (exception.c) sbepe return_address ║= *vcpu_pc(vcpu);
~ 0001296c: b9002fe8 str w8, [sp, #44]
enter_exception32:275.36 (exception.c) Sbepe return_address += return_offsets[║vect_offset >> 2][is_thumb];
~ 00012970: b85d03a8 ldur w8, [x29, #-48]
enter_exception32:275.48 (exception.c) sbepe return_address += return_offsets[vect_offset ║>> 2][is_thumb];
~ 00012974: 53027d08 lsr w8, w8, #2
enter_exception32:275.21 (exception.c) sbepe return_address += ║return_offsets[vect_offset >> 2][is_thumb];
~ 00012978: d000002a adrp x10, 18000 <cc_map+0x74>
~ 0001297c: 910d514a add x10, x10, #0x354
~ 00012980: 8b28454a add x10, x10, w8, uxtw #1
~ 00012984: 3940d3e8 ldrb w8, [sp, #52]
~ 00012988: 2a0803eb mov w11, w8
~ 0001298c: 9240016b and x11, x11, #0x1
~ 00012990: 386b6948 ldrb w8, [x10, x11]
enter_exception32:275.18 (exception.c) sbepe return_address ║+= return_offsets[vect_offset >> 2][is_thumb];
~ 00012994: b9402fe9 ldr w9, [sp, #44]
~ 00012998: 0b080128 add w8, w9, w8
~ 0001299c: b9002fe8 str w8, [sp, #44]
enter_exception32:278.9 (exception.c) Sbepe switch(║mode) {
~ 000129a0: b85d43a8 ldur w8, [x29, #-44]
enter_exception32:278.2 (exception.c) sbepe ║switch(mode) {
~ 000129a4: 2a0803e9 mov w9, w8
~ 000129a8: 71005d08 subs w8, w8, #0x17
~ 000129ac: b9002be9 str w9, [sp, #40]
~ ┌──000129b0: 540000c0 b.eq 129c8 <enter_exception32+0xd0> // b.none
│
~ │┌─000129b4: 14000001 b 129b8 <enter_exception32+0xc0> <- 000129b0(b.cc-succ)<fallthrough>
││
~ │└>000129b8: b9402be8 ldr w8, [sp, #40] <- 000129b4(b)<enter_exception32+0xc0>
│ enter_exception32:278.2 (exception.c) sbepe ║switch(mode) {
~ │ 000129bc: 71006d09 subs w9, w8, #0x1b
~ │┌─000129c0: 54000220 b.eq 12a04 <enter_exception32+0x10c> // b.none
││
~ ┌──┼┼─000129c4: 1400001f b 12a40 <enter_exception32+0x148> <- 000129c0(b.cc-succ)<fallthrough>
│ ││
│ ││ enter_exception32:280.25 (exception.c) Sbepe __vcpu_write_spsr_abt(║vcpu, host_spsr_to_spsr32(spsr));
~ │ └┼>000129c8: f85d83a0 ldur x0, [x29, #-40] <- 000129b0(b.cc)<enter_exception32+0xd0>
│ │ enter_exception32:280.51 (exception.c) sbepe __vcpu_write_spsr_abt(vcpu, host_spsr_to_spsr32(║spsr));
~ │ │ 000129cc: f9401fe8 ldr x8, [sp, #56]
~ │ │ 000129d0: f90013e0 str x0, [sp, #32]
│ │ enter_exception32:280.31 (exception.c) sbepe __vcpu_write_spsr_abt(vcpu, ║host_spsr_to_spsr32(spsr));
~ │ │ 000129d4: aa0803e0 mov x0, x8
~ │ │ 000129d8: 9400017b bl 12fc4 <host_spsr_to_spsr32>
│ │
~ │ │ 000129dc: f94013e8 ldr x8, [sp, #32] <- 000129d8(bl-succ)<return>
~ │ │ 000129e0: f9000fe0 str x0, [sp, #24]
│ │ enter_exception32:280.3 (exception.c) sbepe ║__vcpu_write_spsr_abt(vcpu, host_spsr_to_spsr32(spsr));
~ │ │ 000129e4: aa0803e0 mov x0, x8
~ │ │ 000129e8: f9400fe1 ldr x1, [sp, #24]
~ │ │ 000129ec: 94000160 bl 12f6c <__vcpu_write_spsr_abt>
│ │
│ │ enter_exception32:281.39 (exception.c) Sbepe vcpu_gp_regs(vcpu)->compat_lr_abt = ║return_address;
~ │ │ 000129f0: b9402fe9 ldr w9, [sp, #44] <- 000129ec(bl-succ)<return>
~ │ │ 000129f4: 2a0903e8 mov w8, w9
│ │ enter_exception32:281.3 (exception.c) sbepe ║vcpu_gp_regs(vcpu)->compat_lr_abt = return_address;
~ │ │ 000129f8: f85d83aa ldur x10, [x29, #-40]
│ │ enter_exception32:281.37 (exception.c) sbepe vcpu_gp_regs(vcpu)->compat_lr_abt ║= return_address;
~ │ │ 000129fc: f9010148 str x8, [x10, #512]
│ │ enter_exception32:282.3 (exception.c) Sbepe ║break;
~ │ ┌─┼─00012a00: 14000010 b 12a40 <enter_exception32+0x148>
│ │ │
│ │ │ enter_exception32:285.25 (exception.c) Sbepe __vcpu_write_spsr_und(║vcpu, host_spsr_to_spsr32(spsr));
~ │ │ └>00012a04: f85d83a0 ldur x0, [x29, #-40] <- 000129c0(b.cc)<enter_exception32+0x10c>
│ │ enter_exception32:285.51 (exception.c) sbepe __vcpu_write_spsr_und(vcpu, host_spsr_to_spsr32(║spsr));
~ │ │ 00012a08: f9401fe8 ldr x8, [sp, #56]
~ │ │ 00012a0c: f9000be0 str x0, [sp, #16]
│ │ enter_exception32:285.31 (exception.c) sbepe __vcpu_write_spsr_und(vcpu, ║host_spsr_to_spsr32(spsr));
~ │ │ 00012a10: aa0803e0 mov x0, x8
~ │ │ 00012a14: 9400016c bl 12fc4 <host_spsr_to_spsr32>
│ │
~ │ │ 00012a18: f9400be8 ldr x8, [sp, #16] <- 00012a14(bl-succ)<return>
~ │ │ 00012a1c: f90007e0 str x0, [sp, #8]
│ │ enter_exception32:285.3 (exception.c) sbepe ║__vcpu_write_spsr_und(vcpu, host_spsr_to_spsr32(spsr));
~ │ │ 00012a20: aa0803e0 mov x0, x8
~ │ │ 00012a24: f94007e1 ldr x1, [sp, #8]
~ │ │ 00012a28: 9400017a bl 13010 <__vcpu_write_spsr_und>
│ │
│ │ enter_exception32:286.39 (exception.c) Sbepe vcpu_gp_regs(vcpu)->compat_lr_und = ║return_address;
~ │ │ 00012a2c: b9402fe9 ldr w9, [sp, #44] <- 00012a28(bl-succ)<return>
~ │ │ 00012a30: 2a0903e8 mov w8, w9
│ │ enter_exception32:286.3 (exception.c) sbepe ║vcpu_gp_regs(vcpu)->compat_lr_und = return_address;
~ │ │ 00012a34: f85d83aa ldur x10, [x29, #-40]
│ │ enter_exception32:286.37 (exception.c) sbepe vcpu_gp_regs(vcpu)->compat_lr_und ║= return_address;
~ │ │ 00012a38: f9010948 str x8, [x10, #528]
│ │ enter_exception32:287.3 (exception.c) Sbepe ║break;
~ │ │ ┌─00012a3c: 14000001 b 12a40 <enter_exception32+0x148>
│ │ │
│ │ │ enter_exception32:291.6 (exception.c) Sbepe if (║sctlr & (1 << 13))
~ └>└>└>00012a40: 3940c7e8 ldrb w8, [sp, #49] <- 000129c4(b)<enter_exception32+0x148>,00012a00(b)<enter_exception32+0x148>,00012a3c(b)<enter_exception32+0x148>
~ ┌──00012a44: 362800c8 tbz w8, #5, 12a5c <enter_exception32+0x164>
│
~ │┌─00012a48: 14000001 b 12a4c <enter_exception32+0x154> <- 00012a44(b.cc-succ)<fallthrough>
││
││ enter_exception32:292.15 (exception.c) Sbepe vect_offset ║+= 0xffff0000;
~ │└>00012a4c: b85d03a8 ldur w8, [x29, #-48] <- 00012a48(b)<enter_exception32+0x154>
~ │ 00012a50: 71404108 subs w8, w8, #0x10, lsl #12
~ │ 00012a54: b81d03a8 stur w8, [x29, #-48]
│ enter_exception32:292.3 (exception.c) sbepe ║vect_offset += 0xffff0000;
~ ┌┼──00012a58: 14000009 b 12a7c <enter_exception32+0x184>
││
││ enter_exception32:294.38 (exception.c) Sbepe vect_offset += __vcpu_read_sys_reg(║vcpu, VBAR_EL1);
~ │└─>00012a5c: f85d83a0 ldur x0, [x29, #-40] <- 00012a44(b.cc)<enter_exception32+0x164>
~ │ 00012a60: 528001e1 mov w1, #0xf // #15
│ enter_exception32:294.18 (exception.c) sbepe vect_offset += ║__vcpu_read_sys_reg(vcpu, VBAR_EL1);
~ │ 00012a64: 940000a9 bl 12d08 <__vcpu_read_sys_reg>
│
│ enter_exception32:294.15 (exception.c) sbepe vect_offset ║+= __vcpu_read_sys_reg(vcpu, VBAR_EL1);
~ │ 00012a68: b85d03a8 ldur w8, [x29, #-48] <- 00012a64(bl-succ)<return>
~ │ 00012a6c: 0b000108 add w8, w8, w0
~ │ 00012a70: 2a0803e2 mov w2, w8
~ │ 00012a74: b81d03a2 stur w2, [x29, #-48]
~ │ ┌─00012a78: 14000001 b 12a7c <enter_exception32+0x184>
│ │
│ │ enter_exception32:296.19 (exception.c) Sbepe *vcpu_pc(vcpu) = ║vect_offset;
~ └>└>00012a7c: b85d03a8 ldur w8, [x29, #-48] <- 00012a58(b)<enter_exception32+0x184>,00012a78(b)<enter_exception32+0x184>
~ 00012a80: 2a0803e9 mov w9, w8
enter_exception32:296.11 (exception.c) sbepe *vcpu_pc(║vcpu) = vect_offset;
~ 00012a84: f85d83aa ldur x10, [x29, #-40]
~ 00012a88: f81e83aa stur x10, [x29, #-24]
e: 0x12a8c 0x12a90 vcpu_pc inlined from enter_exception32:296 (exception.c) <d6730>:
e vcpu_pc:132.27 (kvm_emulate.h) Sbepe return (unsigned long *)&║vcpu_gp_regs(vcpu)->pc;
+vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12a8c 0x12a90 (DW_OP_fbreg -0x18) vcpu_pc(inlined):enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c
~e 00012a8c: f85e83aa ldur x10, [x29, #-24]
-vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12a8c 0x12a90 (DW_OP_fbreg -0x18) vcpu_pc(inlined):enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c
enter_exception32:296.17 (exception.c) Sbepe *vcpu_pc(vcpu) ║= vect_offset;
~ 00012a90: f9013149 str x9, [x10, #608]
enter_exception32:297.1 (exception.c) Sbepe ║}
~ 00012a94: a9477bfd ldp x29, x30, [sp, #112]
~ 00012a98: 910203ff add sp, sp, #0x80
00012904 CFA:r29+16 r29:c-16 r30:c-8
~ 00012a9c: d65f03c0 ret
-vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x128f8 0x12aa0 (DW_OP_fbreg -0x28) enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c:266
-mode param typedef(u32=typedef(__u32=unsigned int (base type, DW_ATE_unsigned size:4))) 0x128f8 0x12aa0 (DW_OP_fbreg -0x2c) enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c:266
-vect_offset param typedef(u32=typedef(__u32=unsigned int (base type, DW_ATE_unsigned size:4))) 0x128f8 0x12aa0 (DW_OP_fbreg -0x30) enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c:266
-spsr var long unsigned int (base type, DW_ATE_unsigned size:8) 0x128f8 0x12aa0 (DW_OP_breg31 0x38) enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c:268
-is_thumb var typedef(bool=_Bool (base type, DW_ATE_boolean size:1)) 0x128f8 0x12aa0 (DW_OP_breg31 0x34) enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c:269
-sctlr var typedef(u32=typedef(__u32=unsigned int (base type, DW_ATE_unsigned size:4))) 0x128f8 0x12aa0 (DW_OP_breg31 0x30) enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c:270
-return_address var typedef(u32=typedef(__u32=unsigned int (base type, DW_ATE_unsigned size:4))) 0x128f8 0x12aa0 (DW_OP_breg31 0x2c) enter_exception32:arch/arm64/kvm/hyp/nvhe/../exception.c:271
**00012aa0 <enter_exception64>:
+ enter_exception64 params:
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x12aa0 0x12d08 (DW_OP_fbreg -0x30)
+target_mode param long unsigned int (base type, DW_ATE_unsigned size:8) 0x12aa0 0x12d08 (DW_OP_breg31 0x38)
+type param enum exception_type<c7fa0>/<c82e3> 0x12aa0 0x12d08 (DW_OP_breg31 0x34)
enter_exception64:79.0 (exception.c) Sbepe ║{
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x12aa0 0x12d08 (DW_OP_fbreg -0x30) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:77
+target_mode param long unsigned int (base type, DW_ATE_unsigned size:8) 0x12aa0 0x12d08 (DW_OP_breg31 0x38) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:77
+type param enum exception_type<c7fa0>/<c82e3> 0x12aa0 0x12d08 (DW_OP_breg31 0x34) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:78
+sctlr var long unsigned int (base type, DW_ATE_unsigned size:8) 0x12aa0 0x12d08 (DW_OP_breg31 0x28) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:80
+vbar var long unsigned int (base type, DW_ATE_unsigned size:8) 0x12aa0 0x12d08 (DW_OP_breg31 0x20) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:80
+old var long unsigned int (base type, DW_ATE_unsigned size:8) 0x12aa0 0x12d08 (DW_OP_breg31 0x18) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:80
+new var long unsigned int (base type, DW_ATE_unsigned size:8) 0x12aa0 0x12d08 (DW_OP_breg31 0x10) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:80
+mode var long unsigned int (base type, DW_ATE_unsigned size:8) 0x12aa0 0x12d08 (DW_OP_breg31 0x8) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:80
+exc_offset var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x12aa0 0x12d08 (DW_OP_breg31 0x0) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:81
~ 00012aa0: d10203ff sub sp, sp, #0x80 <- 000128dc(bl)<enter_exception64>
~ 00012aa4: a9077bfd stp x29, x30, [sp, #112]
00012aa0 CFA:r31 r29:u r30:u
~ 00012aa8: 9101c3fd add x29, sp, #0x70
~ 00012aac: f81d03a0 stur x0, [x29, #-48]
~ 00012ab0: f9001fe1 str x1, [sp, #56]
~ 00012ab4: b90037e2 str w2, [sp, #52]
enter_exception64:83.20 (exception.c) SbePe mode = *vcpu_cpsr(║vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT);
~ 00012ab8: f85d03a8 ldur x8, [x29, #-48]
~ 00012abc: f81d83a8 stur x8, [x29, #-40]
f: 0x12ac0 0x12ac4 vcpu_cpsr inlined from enter_exception64:83 (exception.c) <d67e2>:
f vcpu_cpsr:137.27 (kvm_emulate.h) Sbepe return (unsigned long *)&║vcpu_gp_regs(vcpu)->pstate;
+vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12ac0 0x12ac4 (DW_OP_fbreg -0x28) vcpu_cpsr(inlined):enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c
~f 00012ac0: f85d83a8 ldur x8, [x29, #-40]
-vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12ac0 0x12ac4 (DW_OP_fbreg -0x28) vcpu_cpsr(inlined):enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c
enter_exception64:83.9 (exception.c) Sbepe mode = ║*vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT);
~ 00012ac4: f9413508 ldr x8, [x8, #616]
enter_exception64:83.26 (exception.c) sbepe mode = *vcpu_cpsr(vcpu) ║& (PSR_MODE_MASK | PSR_MODE32_BIT);
~ 00012ac8: 92401108 and x8, x8, #0x1f
enter_exception64:83.7 (exception.c) sbepe mode ║= *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT);
~ 00012acc: f90007e8 str x8, [sp, #8]
enter_exception64:85.11 (exception.c) Sbepe if (║mode == target_mode)
~ 00012ad0: f94007e8 ldr x8, [sp, #8]
enter_exception64:85.19 (exception.c) sbepe if (mode == ║target_mode)
~ 00012ad4: f9401fe9 ldr x9, [sp, #56]
enter_exception64:85.11 (exception.c) sbepe if (║mode == target_mode)
~ 00012ad8: eb090108 subs x8, x8, x9
~ ┌──00012adc: 540000c1 b.ne 12af4 <enter_exception64+0x54> // b.any
│
~ │┌─00012ae0: 14000001 b 12ae4 <enter_exception64+0x44> <- 00012adc(b.cc-succ)<fallthrough>
││
~ │└>00012ae4: 52804008 mov w8, #0x200 // #512 <- 00012ae0(b)<enter_exception64+0x44>
~ │ 00012ae8: 2a0803e9 mov w9, w8
│ enter_exception64:86.14 (exception.c) Sbepe exc_offset ║= CURRENT_EL_SP_ELx_VECTOR;
~ │ 00012aec: f90003e9 str x9, [sp]
│ enter_exception64:86.3 (exception.c) sbepe ║exc_offset = CURRENT_EL_SP_ELx_VECTOR;
~ ┌─────┼──00012af0: 14000017 b 12b4c <enter_exception64+0xac>
│ │
│ │ enter_exception64:87.12 (exception.c) Sbepe else if ((║mode | PSR_MODE_THREAD_BIT) == target_mode)
~ │ └─>00012af4: f94007e8 ldr x8, [sp, #8] <- 00012adc(b.cc)<enter_exception64+0x54>
│ enter_exception64:87.17 (exception.c) sbepe else if ((mode ║| PSR_MODE_THREAD_BIT) == target_mode)
~ │ 00012af8: b2400108 orr x8, x8, #0x1
│ enter_exception64:87.43 (exception.c) sbepe else if ((mode | PSR_MODE_THREAD_BIT) == ║target_mode)
~ │ 00012afc: f9401fe9 ldr x9, [sp, #56]
│ enter_exception64:87.11 (exception.c) sbepe else if (║(mode | PSR_MODE_THREAD_BIT) == target_mode)
~ │ 00012b00: eb090108 subs x8, x8, x9
~ │ ┌──00012b04: 540000a1 b.ne 12b18 <enter_exception64+0x78> // b.any
│ │
~ │ │┌─00012b08: 14000001 b 12b0c <enter_exception64+0x6c> <- 00012b04(b.cc-succ)<fallthrough>
│ ││
~ │ │└>00012b0c: aa1f03e8 mov x8, xzr <- 00012b08(b)<enter_exception64+0x6c>
│ │ enter_exception64:88.14 (exception.c) Sbepe exc_offset ║= CURRENT_EL_SP_EL0_VECTOR;
~ │ │ 00012b10: f90003e8 str x8, [sp]
│ │ enter_exception64:88.3 (exception.c) sbepe ║exc_offset = CURRENT_EL_SP_EL0_VECTOR;
~ │┌────┼──00012b14: 1400000d b 12b48 <enter_exception64+0xa8>
││ │
││ │ enter_exception64:89.11 (exception.c) Sbepe else if (║!(mode & PSR_MODE32_BIT))
~ ││ └─>00012b18: 394023e8 ldrb w8, [sp, #8] <- 00012b04(b.cc)<enter_exception64+0x78>
~ ││ ┌──00012b1c: 372000c8 tbnz w8, #4, 12b34 <enter_exception64+0x94>
││ │
~ ││ │┌─00012b20: 14000001 b 12b24 <enter_exception64+0x84> <- 00012b1c(b.cc-succ)<fallthrough>
││ ││
~ ││ │└>00012b24: 52808008 mov w8, #0x400 // #1024 <- 00012b20(b)<enter_exception64+0x84>
~ ││ │ 00012b28: 2a0803e9 mov w9, w8
││ │ enter_exception64:90.14 (exception.c) Sbepe exc_offset ║= LOWER_EL_AArch64_VECTOR;
~ ││ │ 00012b2c: f90003e9 str x9, [sp]
││ │ enter_exception64:90.3 (exception.c) sbepe ║exc_offset = LOWER_EL_AArch64_VECTOR;
~ ││ ┌──┼──00012b30: 14000005 b 12b44 <enter_exception64+0xa4>
││ │ │
~ ││ │ └─>00012b34: 5280c008 mov w8, #0x600 // #1536 <- 00012b1c(b.cc)<enter_exception64+0x94>
~ ││ │ 00012b38: 2a0803e9 mov w9, w8
││ │ enter_exception64:92.14 (exception.c) Sbepe exc_offset ║= LOWER_EL_AArch32_VECTOR;
~ ││ │ 00012b3c: f90003e9 str x9, [sp]
~ ││ │ ┌─00012b40: 14000001 b 12b44 <enter_exception64+0xa4>
││ │ │
~ ││ └>┌─└>00012b44: 14000001 b 12b48 <enter_exception64+0xa8> <- 00012b30(b)<enter_exception64+0xa4>,00012b40(b)<enter_exception64+0xa4>
││ │
~ │└>┌─└──>00012b48: 14000001 b 12b4c <enter_exception64+0xac> <- 00012b14(b)<enter_exception64+0xa8>,00012b44(b)<enter_exception64+0xa8>
│ │
│ │ enter_exception64:94.10 (exception.c) Sbepe switch (║target_mode) {
~ └─>└────>00012b4c: f9401fe8 ldr x8, [sp, #56] <- 00012af0(b)<enter_exception64+0xac>,00012b48(b)<enter_exception64+0xac>
enter_exception64:94.2 (exception.c) sbepe ║switch (target_mode) {
~ 00012b50: f1001508 subs x8, x8, #0x5
~ ┌────00012b54: 54000241 b.ne 12b9c <enter_exception64+0xfc> // b.any
│
~ │ ┌─00012b58: 14000001 b 12b5c <enter_exception64+0xbc> <- 00012b54(b.cc-succ)<fallthrough>
│ │
│ │ enter_exception64:96.30 (exception.c) Sbepe vbar = __vcpu_read_sys_reg(║vcpu, VBAR_EL1);
~ │ └>00012b5c: f85d03a0 ldur x0, [x29, #-48] <- 00012b58(b)<enter_exception64+0xbc>
~ │ 00012b60: 528001e1 mov w1, #0xf // #15
│ enter_exception64:96.10 (exception.c) sbepe vbar = ║__vcpu_read_sys_reg(vcpu, VBAR_EL1);
~ │ 00012b64: 94000069 bl 12d08 <__vcpu_read_sys_reg>
│
│ enter_exception64:96.8 (exception.c) sbepe vbar ║= __vcpu_read_sys_reg(vcpu, VBAR_EL1);
~ │ 00012b68: f90013e0 str x0, [sp, #32] <- 00012b64(bl-succ)<return>
│ enter_exception64:97.31 (exception.c) Sbepe sctlr = __vcpu_read_sys_reg(║vcpu, SCTLR_EL1);
~ │ 00012b6c: f85d03a0 ldur x0, [x29, #-48]
~ │ 00012b70: 52800061 mov w1, #0x3 // #3
│ enter_exception64:97.11 (exception.c) sbepe sctlr = ║__vcpu_read_sys_reg(vcpu, SCTLR_EL1);
~ │ 00012b74: 94000065 bl 12d08 <__vcpu_read_sys_reg>
│
│ enter_exception64:97.9 (exception.c) sbepe sctlr ║= __vcpu_read_sys_reg(vcpu, SCTLR_EL1);
~ │ 00012b78: f90017e0 str x0, [sp, #40] <- 00012b74(bl-succ)<return>
│ enter_exception64:98.24 (exception.c) Sbepe __vcpu_write_sys_reg(║vcpu, *vcpu_pc(vcpu), ELR_EL1);
~ │ 00012b7c: f85d03a8 ldur x8, [x29, #-48]
~ │ 00012b80: f81e03a8 stur x8, [x29, #-32]
g: 0x12b84 0x12b88 vcpu_pc inlined from enter_exception64:98 (exception.c) <d67ff>:
g │ vcpu_pc:132.27 (kvm_emulate.h) Sbepe return (unsigned long *)&║vcpu_gp_regs(vcpu)->pc;
+vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12b84 0x12b88 (DW_OP_fbreg -0x20) vcpu_pc(inlined):enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c
~g │ 00012b84: f85e03a9 ldur x9, [x29, #-32]
-vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12b84 0x12b88 (DW_OP_fbreg -0x20) vcpu_pc(inlined):enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c
│ enter_exception64:98.30 (exception.c) Sbepe __vcpu_write_sys_reg(vcpu, ║*vcpu_pc(vcpu), ELR_EL1);
~ │ 00012b88: f9413121 ldr x1, [x9, #608]
~ │ 00012b8c: 52800d62 mov w2, #0x6b // #107
│ enter_exception64:98.3 (exception.c) sbepe ║__vcpu_write_sys_reg(vcpu, *vcpu_pc(vcpu), ELR_EL1);
~ │ 00012b90: aa0803e0 mov x0, x8
~ │ 00012b94: 94000215 bl 133e8 <__vcpu_write_sys_reg>
│
│ enter_exception64:99.3 (exception.c) Sbepe ║break;
~ │┌───00012b98: 14000004 b 12ba8 <enter_exception64+0x108> <- 00012b94(bl-succ)<return>
││
││ enter_exception64:102.3 (exception.c) Sbepe ║BUG();
~ └┼>┌─00012b9c: 14000001 b 12ba0 <enter_exception64+0x100> <- 00012b54(b.cc)<enter_exception64+0xfc>
│ │
│ │ enter_exception64:102.3 (exception.c) sbepe ║BUG();
~ │ └>00012ba0: d4210000 brk #0x800 <- 00012b9c(b)<enter_exception64+0x100>
~ │ ┌─00012ba4: 14000001 b 12ba8 <enter_exception64+0x108>
│ │
│ │ enter_exception64:105.19 (exception.c) Sbepe *vcpu_pc(vcpu) = ║vbar + exc_offset + type;
~ └>└>00012ba8: f94013e8 ldr x8, [sp, #32] <- 00012b98(b)<enter_exception64+0x108>,00012ba4(b)<enter_exception64+0x108>
enter_exception64:105.26 (exception.c) sbepe *vcpu_pc(vcpu) = vbar + ║exc_offset + type;
~ 00012bac: f94003e9 ldr x9, [sp]
enter_exception64:105.24 (exception.c) sbepe *vcpu_pc(vcpu) = vbar ║+ exc_offset + type;
~ 00012bb0: 8b090108 add x8, x8, x9
enter_exception64:105.39 (exception.c) sbepe *vcpu_pc(vcpu) = vbar + exc_offset + ║type;
~ 00012bb4: b94037ea ldr w10, [sp, #52]
~ 00012bb8: 2a0a03e9 mov w9, w10
enter_exception64:105.37 (exception.c) sbepe *vcpu_pc(vcpu) = vbar + exc_offset ║+ type;
~ 00012bbc: 8b090108 add x8, x8, x9
enter_exception64:105.11 (exception.c) sbepe *vcpu_pc(║vcpu) = vbar + exc_offset + type;
~ 00012bc0: f85d03a9 ldur x9, [x29, #-48]
~ 00012bc4: f81f83a9 stur x9, [x29, #-8]
h: 0x12bc8 0x12bcc vcpu_pc inlined from enter_exception64:105 (exception.c) <d681c>:
h vcpu_pc:132.27 (kvm_emulate.h) Sbepe return (unsigned long *)&║vcpu_gp_regs(vcpu)->pc;
+vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12bc8 0x12bcc (DW_OP_fbreg -0x8) vcpu_pc(inlined):enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c
~h 00012bc8: f85f83a9 ldur x9, [x29, #-8]
-vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12bc8 0x12bcc (DW_OP_fbreg -0x8) vcpu_pc(inlined):enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c
enter_exception64:105.17 (exception.c) Sbepe *vcpu_pc(vcpu) ║= vbar + exc_offset + type;
~ 00012bcc: f9013128 str x8, [x9, #608]
enter_exception64:107.19 (exception.c) Sbepe old = *vcpu_cpsr(║vcpu);
~ 00012bd0: f85d03a8 ldur x8, [x29, #-48]
~ 00012bd4: f81f03a8 stur x8, [x29, #-16]
i: 0x12bd8 0x12bdc vcpu_cpsr inlined from enter_exception64:107 (exception.c) <d6839>:
i vcpu_cpsr:137.27 (kvm_emulate.h) Sbepe return (unsigned long *)&║vcpu_gp_regs(vcpu)->pstate;
+vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12bd8 0x12bdc (DW_OP_fbreg -0x10) vcpu_cpsr(inlined):enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c
~i 00012bd8: f85f03a8 ldur x8, [x29, #-16]
-vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12bd8 0x12bdc (DW_OP_fbreg -0x10) vcpu_cpsr(inlined):enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c
enter_exception64:107.8 (exception.c) Sbepe old = ║*vcpu_cpsr(vcpu);
~ 00012bdc: f9413508 ldr x8, [x8, #616]
enter_exception64:107.6 (exception.c) sbepe old ║= *vcpu_cpsr(vcpu);
~ 00012be0: f9000fe8 str x8, [sp, #24]
~ 00012be4: aa1f03e8 mov x8, xzr
enter_exception64:108.6 (exception.c) Sbepe new ║= 0;
~ 00012be8: f9000be8 str x8, [sp, #16]
enter_exception64:110.10 (exception.c) Sbepe new |= (║old & PSR_N_BIT);
~ 00012bec: f9400fe8 ldr x8, [sp, #24]
enter_exception64:110.14 (exception.c) sbepe new |= (old ║& PSR_N_BIT);
~ 00012bf0: 92610108 and x8, x8, #0x80000000
enter_exception64:110.6 (exception.c) sbepe new ║|= (old & PSR_N_BIT);
~ 00012bf4: f9400be9 ldr x9, [sp, #16]
~ 00012bf8: aa080128 orr x8, x9, x8
~ 00012bfc: f9000be8 str x8, [sp, #16]
enter_exception64:111.10 (exception.c) Sbepe new |= (║old & PSR_Z_BIT);
~ 00012c00: f9400fe8 ldr x8, [sp, #24]
enter_exception64:111.14 (exception.c) sbepe new |= (old ║& PSR_Z_BIT);
~ 00012c04: 92620108 and x8, x8, #0x40000000
enter_exception64:111.6 (exception.c) sbepe new ║|= (old & PSR_Z_BIT);
~ 00012c08: f9400be9 ldr x9, [sp, #16]
~ 00012c0c: aa080128 orr x8, x9, x8
~ 00012c10: f9000be8 str x8, [sp, #16]
enter_exception64:112.10 (exception.c) Sbepe new |= (║old & PSR_C_BIT);
~ 00012c14: f9400fe8 ldr x8, [sp, #24]
enter_exception64:112.14 (exception.c) sbepe new |= (old ║& PSR_C_BIT);
~ 00012c18: 92630108 and x8, x8, #0x20000000
enter_exception64:112.6 (exception.c) sbepe new ║|= (old & PSR_C_BIT);
~ 00012c1c: f9400be9 ldr x9, [sp, #16]
~ 00012c20: aa080128 orr x8, x9, x8
~ 00012c24: f9000be8 str x8, [sp, #16]
enter_exception64:113.10 (exception.c) Sbepe new |= (║old & PSR_V_BIT);
~ 00012c28: f9400fe8 ldr x8, [sp, #24]
enter_exception64:113.14 (exception.c) sbepe new |= (old ║& PSR_V_BIT);
~ 00012c2c: 92640108 and x8, x8, #0x10000000
enter_exception64:113.6 (exception.c) sbepe new ║|= (old & PSR_V_BIT);
~ 00012c30: f9400be9 ldr x9, [sp, #16]
~ 00012c34: aa080128 orr x8, x9, x8
~ 00012c38: f9000be8 str x8, [sp, #16]
enter_exception64:117.10 (exception.c) Sbepe new |= (║old & PSR_DIT_BIT);
~ 00012c3c: f9400fe8 ldr x8, [sp, #24]
enter_exception64:117.14 (exception.c) sbepe new |= (old ║& PSR_DIT_BIT);
~ 00012c40: 92680108 and x8, x8, #0x1000000
enter_exception64:117.6 (exception.c) sbepe new ║|= (old & PSR_DIT_BIT);
~ 00012c44: f9400be9 ldr x9, [sp, #16]
~ 00012c48: aa080128 orr x8, x9, x8
~ 00012c4c: f9000be8 str x8, [sp, #16]
enter_exception64:125.10 (exception.c) Sbepe new |= (║old & PSR_PAN_BIT);
~ 00012c50: f9400fe8 ldr x8, [sp, #24]
enter_exception64:125.14 (exception.c) sbepe new |= (old ║& PSR_PAN_BIT);
~ 00012c54: 926a0108 and x8, x8, #0x400000
enter_exception64:125.6 (exception.c) sbepe new ║|= (old & PSR_PAN_BIT);
~ 00012c58: f9400be9 ldr x9, [sp, #16]
~ 00012c5c: aa080128 orr x8, x9, x8
~ 00012c60: f9000be8 str x8, [sp, #16]
enter_exception64:126.6 (exception.c) Sbepe if (║!(sctlr & SCTLR_EL1_SPAN))
~ 00012c64: 3940abea ldrb w10, [sp, #42]
~ ┌───00012c68: 373800ca tbnz w10, #7, 12c80 <enter_exception64+0x1e0>
│
~ │ ┌─00012c6c: 14000001 b 12c70 <enter_exception64+0x1d0> <- 00012c68(b.cc-succ)<fallthrough>
│ │
│ │ enter_exception64:127.7 (exception.c) Sbepe new ║|= PSR_PAN_BIT;
~ │ └>00012c70: f9400be8 ldr x8, [sp, #16] <- 00012c6c(b)<enter_exception64+0x1d0>
~ │ 00012c74: b26a0108 orr x8, x8, #0x400000
~ │ 00012c78: f9000be8 str x8, [sp, #16]
│ enter_exception64:127.3 (exception.c) sbepe ║new |= PSR_PAN_BIT;
~ │ ┌─00012c7c: 14000001 b 12c80 <enter_exception64+0x1e0>
│ │
│ │ enter_exception64:137.6 (exception.c) Sbepe if (║sctlr & SCTLR_ELx_DSSBS)
~ └>└>00012c80: 3940b7e8 ldrb w8, [sp, #45] <- 00012c68(b.cc)<enter_exception64+0x1e0>,00012c7c(b)<enter_exception64+0x1e0>
~ ┌───00012c84: 362000c8 tbz w8, #4, 12c9c <enter_exception64+0x1fc>
│
~ │ ┌─00012c88: 14000001 b 12c8c <enter_exception64+0x1ec> <- 00012c84(b.cc-succ)<fallthrough>
│ │
│ │ enter_exception64:138.7 (exception.c) Sbepe new ║|= PSR_SSBS_BIT;
~ │ └>00012c8c: f9400be8 ldr x8, [sp, #16] <- 00012c88(b)<enter_exception64+0x1ec>
~ │ 00012c90: b2740108 orr x8, x8, #0x1000
~ │ 00012c94: f9000be8 str x8, [sp, #16]
│ enter_exception64:138.3 (exception.c) sbepe ║new |= PSR_SSBS_BIT;
~ │ ┌─00012c98: 14000001 b 12c9c <enter_exception64+0x1fc>
│ │
│ │ enter_exception64:143.6 (exception.c) Sbepe new ║|= PSR_D_BIT;
~ └>└>00012c9c: f9400be8 ldr x8, [sp, #16] <- 00012c84(b.cc)<enter_exception64+0x1fc>,00012c98(b)<enter_exception64+0x1fc>
~ 00012ca0: b2770108 orr x8, x8, #0x200
~ 00012ca4: f9000be8 str x8, [sp, #16]
enter_exception64:144.6 (exception.c) Sbepe new ║|= PSR_A_BIT;
~ 00012ca8: f9400be8 ldr x8, [sp, #16]
~ 00012cac: b2780108 orr x8, x8, #0x100
~ 00012cb0: f9000be8 str x8, [sp, #16]
enter_exception64:145.6 (exception.c) Sbepe new ║|= PSR_I_BIT;
~ 00012cb4: f9400be8 ldr x8, [sp, #16]
~ 00012cb8: b2790108 orr x8, x8, #0x80
~ 00012cbc: f9000be8 str x8, [sp, #16]
enter_exception64:146.6 (exception.c) Sbepe new ║|= PSR_F_BIT;
~ 00012cc0: f9400be8 ldr x8, [sp, #16]
~ 00012cc4: b27a0108 orr x8, x8, #0x40
~ 00012cc8: f9000be8 str x8, [sp, #16]
enter_exception64:148.9 (exception.c) Sbepe new |= ║target_mode;
~ 00012ccc: f9401fe8 ldr x8, [sp, #56]
enter_exception64:148.6 (exception.c) sbepe new ║|= target_mode;
~ 00012cd0: f9400be9 ldr x9, [sp, #16]
~ 00012cd4: aa080128 orr x8, x9, x8
~ 00012cd8: f9000be8 str x8, [sp, #16]
enter_exception64:150.21 (exception.c) Sbepe *vcpu_cpsr(vcpu) = ║new;
~ 00012cdc: f9400be8 ldr x8, [sp, #16]
enter_exception64:150.13 (exception.c) sbepe *vcpu_cpsr(║vcpu) = new;
~ 00012ce0: f85d03a9 ldur x9, [x29, #-48]
~ 00012ce4: f81e83a9 stur x9, [x29, #-24]
j: 0x12ce8 0x12cec vcpu_cpsr inlined from enter_exception64:150 (exception.c) <d6856>:
j vcpu_cpsr:137.27 (kvm_emulate.h) Sbepe return (unsigned long *)&║vcpu_gp_regs(vcpu)->pstate;
+vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12ce8 0x12cec (DW_OP_fbreg -0x18) vcpu_cpsr(inlined):enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c
~j 00012ce8: f85e83a9 ldur x9, [x29, #-24]
-vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12ce8 0x12cec (DW_OP_fbreg -0x18) vcpu_cpsr(inlined):enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c
enter_exception64:150.19 (exception.c) Sbepe *vcpu_cpsr(vcpu) ║= new;
~ 00012cec: f9013528 str x8, [x9, #616]
enter_exception64:151.20 (exception.c) Sbepe __vcpu_write_spsr(║vcpu, old);
~ 00012cf0: f85d03a0 ldur x0, [x29, #-48]
enter_exception64:151.26 (exception.c) sbepe __vcpu_write_spsr(vcpu, ║old);
~ 00012cf4: f9400fe1 ldr x1, [sp, #24]
enter_exception64:151.2 (exception.c) sbepe ║__vcpu_write_spsr(vcpu, old);
~ 00012cf8: 940001d1 bl 1343c <__vcpu_write_spsr>
enter_exception64:152.1 (exception.c) Sbepe ║}
~ 00012cfc: a9477bfd ldp x29, x30, [sp, #112] <- 00012cf8(bl-succ)<return>
~ 00012d00: 910203ff add sp, sp, #0x80
00012aac CFA:r29+16 r29:c-16 r30:c-8
~ 00012d04: d65f03c0 ret
-vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x12aa0 0x12d08 (DW_OP_fbreg -0x30) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:77
-target_mode param long unsigned int (base type, DW_ATE_unsigned size:8) 0x12aa0 0x12d08 (DW_OP_breg31 0x38) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:77
-type param enum exception_type<c7fa0>/<c82e3> 0x12aa0 0x12d08 (DW_OP_breg31 0x34) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:78
-sctlr var long unsigned int (base type, DW_ATE_unsigned size:8) 0x12aa0 0x12d08 (DW_OP_breg31 0x28) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:80
-vbar var long unsigned int (base type, DW_ATE_unsigned size:8) 0x12aa0 0x12d08 (DW_OP_breg31 0x20) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:80
-old var long unsigned int (base type, DW_ATE_unsigned size:8) 0x12aa0 0x12d08 (DW_OP_breg31 0x18) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:80
-new var long unsigned int (base type, DW_ATE_unsigned size:8) 0x12aa0 0x12d08 (DW_OP_breg31 0x10) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:80
-mode var long unsigned int (base type, DW_ATE_unsigned size:8) 0x12aa0 0x12d08 (DW_OP_breg31 0x8) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:80
-exc_offset var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x12aa0 0x12d08 (DW_OP_breg31 0x0) enter_exception64:arch/arm64/kvm/hyp/nvhe/../exception.c:81
**00012d08 <__vcpu_read_sys_reg>:
+ __vcpu_read_sys_reg params:
+vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12d08 0x12d64 (DW_OP_breg31 0x10)
+reg param int (base type, DW_ATE_signed size:4) 0x12d08 0x12d64 (DW_OP_breg31 0xc)
__vcpu_read_sys_reg:22.0 (exception.c) Sbepe ║{
+vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12d08 0x12d64 (DW_OP_breg31 0x10) __vcpu_read_sys_reg:arch/arm64/kvm/hyp/nvhe/../exception.c:21
+reg param int (base type, DW_ATE_signed size:4) 0x12d08 0x12d64 (DW_OP_breg31 0xc) __vcpu_read_sys_reg:arch/arm64/kvm/hyp/nvhe/../exception.c:21
+val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x12d08 0x12d64 (DW_OP_breg31 0x0) __vcpu_read_sys_reg:arch/arm64/kvm/hyp/nvhe/../exception.c:23
~ 00012d08: d100c3ff sub sp, sp, #0x30 <- 00012938(bl)<__vcpu_read_sys_reg>,00012a64(bl)<__vcpu_read_sys_reg>,00012b64(bl)<__vcpu_read_sys_reg>,00012b74(bl)<__vcpu_read_sys_reg>,00012d80(bl)<__vcpu_read_sys_reg>
~ 00012d0c: a9027bfd stp x29, x30, [sp, #32]
00012d08 CFA:r31 r29:u r30:u
~ 00012d10: 910083fd add x29, sp, #0x20
~ 00012d14: f9000be0 str x0, [sp, #16]
~ 00012d18: b9000fe1 str w1, [sp, #12]
__vcpu_read_sys_reg:25.35 (exception.c) SbePe if (__vcpu_read_sys_reg_from_cpu(║reg, &val))
~ 00012d1c: b9400fe0 ldr w0, [sp, #12]
~ 00012d20: 910003e1 mov x1, sp
__vcpu_read_sys_reg:25.6 (exception.c) sbepe if (║__vcpu_read_sys_reg_from_cpu(reg, &val))
~ 00012d24: 940000d1 bl 13068 <__vcpu_read_sys_reg_from_cpu>
__vcpu_read_sys_reg:25.6 (exception.c) sbepe if (║__vcpu_read_sys_reg_from_cpu(reg, &val))
~ ┌──00012d28: 360000a0 tbz w0, #0, 12d3c <__vcpu_read_sys_reg+0x34> <- 00012d24(bl-succ)<return>
│
~ │┌─00012d2c: 14000001 b 12d30 <__vcpu_read_sys_reg+0x28> <- 00012d28(b.cc-succ)<fallthrough>
││
││ __vcpu_read_sys_reg:26.10 (exception.c) Sbepe return ║val;
~ │└>00012d30: f94003e8 ldr x8, [sp] <- 00012d2c(b)<__vcpu_read_sys_reg+0x28>
│ __vcpu_read_sys_reg:26.3 (exception.c) sbepe ║return val;
~ │ 00012d34: f81f83a8 stur x8, [x29, #-8]
~ ┌┼──00012d38: 14000007 b 12d54 <__vcpu_read_sys_reg+0x4c>
││
││ __vcpu_read_sys_reg:28.9 (exception.c) Sbepe return ║__vcpu_sys_reg(vcpu, reg);
~ │└─>00012d3c: f9400be8 ldr x8, [sp, #16] <- 00012d28(b.cc)<__vcpu_read_sys_reg+0x34>
~ │ 00012d40: b9800fe9 ldrsw x9, [sp, #12]
~ │ 00012d44: 8b090d08 add x8, x8, x9, lsl #3
~ │ 00012d48: f9425108 ldr x8, [x8, #1184]
│ __vcpu_read_sys_reg:28.2 (exception.c) sbepe ║return __vcpu_sys_reg(vcpu, reg);
~ │ 00012d4c: f81f83a8 stur x8, [x29, #-8]
~ │ ┌─00012d50: 14000001 b 12d54 <__vcpu_read_sys_reg+0x4c>
│ │
│ │ __vcpu_read_sys_reg:29.1 (exception.c) Sbepe ║}
~ └>└>00012d54: f85f83a0 ldur x0, [x29, #-8] <- 00012d38(b)<__vcpu_read_sys_reg+0x4c>,00012d50(b)<__vcpu_read_sys_reg+0x4c>
~ 00012d58: a9427bfd ldp x29, x30, [sp, #32]
~ 00012d5c: 9100c3ff add sp, sp, #0x30
00012d14 CFA:r29+16 r29:c-16 r30:c-8
~ 00012d60: d65f03c0 ret
-vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12d08 0x12d64 (DW_OP_breg31 0x10) __vcpu_read_sys_reg:arch/arm64/kvm/hyp/nvhe/../exception.c:21
-reg param int (base type, DW_ATE_signed size:4) 0x12d08 0x12d64 (DW_OP_breg31 0xc) __vcpu_read_sys_reg:arch/arm64/kvm/hyp/nvhe/../exception.c:21
-val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x12d08 0x12d64 (DW_OP_breg31 0x0) __vcpu_read_sys_reg:arch/arm64/kvm/hyp/nvhe/../exception.c:23
**00012d64 <get_except32_cpsr>:
+ get_except32_cpsr params:
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x12d64 0x12f6c (DW_OP_fbreg -0x10)
+mode param typedef(u32=typedef(__u32=unsigned int (base type, DW_ATE_unsigned size:4))) 0x12d64 0x12f6c (DW_OP_fbreg -0x14)
get_except32_cpsr:173.0 (exception.c) Sbepe ║{
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x12d64 0x12f6c (DW_OP_fbreg -0x10) get_except32_cpsr:arch/arm64/kvm/hyp/nvhe/../exception.c:172
+mode param typedef(u32=typedef(__u32=unsigned int (base type, DW_ATE_unsigned size:4))) 0x12d64 0x12f6c (DW_OP_fbreg -0x14) get_except32_cpsr:arch/arm64/kvm/hyp/nvhe/../exception.c:172
+sctlr var typedef(u32=typedef(__u32=unsigned int (base type, DW_ATE_unsigned size:4))) 0x12d64 0x12f6c (DW_OP_breg31 0x18) get_except32_cpsr:arch/arm64/kvm/hyp/nvhe/../exception.c:174
+old var long unsigned int (base type, DW_ATE_unsigned size:8) 0x12d64 0x12f6c (DW_OP_breg31 0x10) get_except32_cpsr:arch/arm64/kvm/hyp/nvhe/../exception.c:175
+new var long unsigned int (base type, DW_ATE_unsigned size:8) 0x12d64 0x12f6c (DW_OP_breg31 0x8) get_except32_cpsr:arch/arm64/kvm/hyp/nvhe/../exception.c:175
~ 00012d64: d10103ff sub sp, sp, #0x40 <- 00012948(bl)<get_except32_cpsr>
~ 00012d68: a9037bfd stp x29, x30, [sp, #48]
00012d64 CFA:r31 r29:u r30:u
~ 00012d6c: 9100c3fd add x29, sp, #0x30
~ 00012d70: f81f03a0 stur x0, [x29, #-16]
~ 00012d74: b81ec3a1 stur w1, [x29, #-20]
get_except32_cpsr:174.34 (exception.c) SbePe u32 sctlr = __vcpu_read_sys_reg(║vcpu, SCTLR_EL1);
~ 00012d78: f85f03a0 ldur x0, [x29, #-16]
~ 00012d7c: 52800061 mov w1, #0x3 // #3
get_except32_cpsr:174.14 (exception.c) sbepe u32 sctlr = ║__vcpu_read_sys_reg(vcpu, SCTLR_EL1);
~ 00012d80: 97ffffe2 bl 12d08 <__vcpu_read_sys_reg>
get_except32_cpsr:174.6 (exception.c) sbepe u32 ║sctlr = __vcpu_read_sys_reg(vcpu, SCTLR_EL1);
~ 00012d84: b9001be0 str w0, [sp, #24] <- 00012d80(bl-succ)<return>
get_except32_cpsr:177.19 (exception.c) Sbepe old = *vcpu_cpsr(║vcpu);
~ 00012d88: f85f03a8 ldur x8, [x29, #-16]
~ 00012d8c: f81f83a8 stur x8, [x29, #-8]
k: 0x12d90 0x12d94 vcpu_cpsr inlined from get_except32_cpsr:177 (exception.c) <d6917>:
k vcpu_cpsr:137.27 (kvm_emulate.h) Sbepe return (unsigned long *)&║vcpu_gp_regs(vcpu)->pstate;
+vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12d90 0x12d94 (DW_OP_fbreg -0x8) vcpu_cpsr(inlined):get_except32_cpsr:arch/arm64/kvm/hyp/nvhe/../exception.c
~k 00012d90: f85f83a8 ldur x8, [x29, #-8]
-vcpu param pointer(const(struct kvm_vcpu<c7fa0>/<c8508>)) 0x12d90 0x12d94 (DW_OP_fbreg -0x8) vcpu_cpsr(inlined):get_except32_cpsr:arch/arm64/kvm/hyp/nvhe/../exception.c
get_except32_cpsr:177.8 (exception.c) Sbepe old = ║*vcpu_cpsr(vcpu);
~ 00012d94: f9413508 ldr x8, [x8, #616]
get_except32_cpsr:177.6 (exception.c) sbepe old ║= *vcpu_cpsr(vcpu);
~ 00012d98: f9000be8 str x8, [sp, #16]
~ 00012d9c: aa1f03e8 mov x8, xzr
get_except32_cpsr:178.6 (exception.c) Sbepe new ║= 0;
~ 00012da0: f90007e8 str x8, [sp, #8]
get_except32_cpsr:180.10 (exception.c) Sbepe new |= (║old & PSR_AA32_N_BIT);
~ 00012da4: f9400be8 ldr x8, [sp, #16]
get_except32_cpsr:180.14 (exception.c) sbepe new |= (old ║& PSR_AA32_N_BIT);
~ 00012da8: 92610108 and x8, x8, #0x80000000
get_except32_cpsr:180.6 (exception.c) sbepe new ║|= (old & PSR_AA32_N_BIT);
~ 00012dac: f94007e9 ldr x9, [sp, #8]
~ 00012db0: aa080128 orr x8, x9, x8
~ 00012db4: f90007e8 str x8, [sp, #8]
get_except32_cpsr:181.10 (exception.c) Sbepe new |= (║old & PSR_AA32_Z_BIT);
~ 00012db8: f9400be8 ldr x8, [sp, #16]
get_except32_cpsr:181.14 (exception.c) sbepe new |= (old ║& PSR_AA32_Z_BIT);
~ 00012dbc: 92620108 and x8, x8, #0x40000000
get_except32_cpsr:181.6 (exception.c) sbepe new ║|= (old & PSR_AA32_Z_BIT);
~ 00012dc0: f94007e9 ldr x9, [sp, #8]
~ 00012dc4: aa080128 orr x8, x9, x8
~ 00012dc8: f90007e8 str x8, [sp, #8]
get_except32_cpsr:182.10 (exception.c) Sbepe new |= (║old & PSR_AA32_C_BIT);
~ 00012dcc: f9400be8 ldr x8, [sp, #16]
get_except32_cpsr:182.14 (exception.c) sbepe new |= (old ║& PSR_AA32_C_BIT);
~ 00012dd0: 92630108 and x8, x8, #0x20000000
get_except32_cpsr:182.6 (exception.c) sbepe new ║|= (old & PSR_AA32_C_BIT);
~ 00012dd4: f94007e9 ldr x9, [sp, #8]
~ 00012dd8: aa080128 orr x8, x9, x8
~ 00012ddc: f90007e8 str x8, [sp, #8]
get_except32_cpsr:183.10 (exception.c) Sbepe new |= (║old & PSR_AA32_V_BIT);
~ 00012de0: f9400be8 ldr x8, [sp, #16]
get_except32_cpsr:183.14 (exception.c) sbepe new |= (old ║& PSR_AA32_V_BIT);
~ 00012de4: 92640108 and x8, x8, #0x10000000
get_except32_cpsr:183.6 (exception.c) sbepe new ║|= (old & PSR_AA32_V_BIT);
~ 00012de8: f94007e9 ldr x9, [sp, #8]
~ 00012dec: aa080128 orr x8, x9, x8
~ 00012df0: f90007e8 str x8, [sp, #8]
get_except32_cpsr:184.10 (exception.c) Sbepe new |= (║old & PSR_AA32_Q_BIT);
~ 00012df4: f9400be8 ldr x8, [sp, #16]
get_except32_cpsr:184.14 (exception.c) sbepe new |= (old ║& PSR_AA32_Q_BIT);
~ 00012df8: 92650108 and x8, x8, #0x8000000
get_except32_cpsr:184.6 (exception.c) sbepe new ║|= (old & PSR_AA32_Q_BIT);
~ 00012dfc: f94007e9 ldr x9, [sp, #8]
~ 00012e00: aa080128 orr x8, x9, x8
~ 00012e04: f90007e8 str x8, [sp, #8]
get_except32_cpsr:190.10 (exception.c) Sbepe new |= (║old & PSR_AA32_DIT_BIT);
~ 00012e08: f9400be8 ldr x8, [sp, #16]
get_except32_cpsr:190.14 (exception.c) sbepe new |= (old ║& PSR_AA32_DIT_BIT);
~ 00012e0c: 92680108 and x8, x8, #0x1000000
get_except32_cpsr:190.6 (exception.c) sbepe new ║|= (old & PSR_AA32_DIT_BIT);
~ 00012e10: f94007e9 ldr x9, [sp, #8]
~ 00012e14: aa080128 orr x8, x9, x8
~ 00012e18: f90007e8 str x8, [sp, #8]
get_except32_cpsr:194.6 (exception.c) Sbepe if (║sctlr & BIT(31))
~ 00012e1c: b9401bea ldr w10, [sp, #24]
~ 00012e20: 2a0a03e2 mov w2, w10
get_except32_cpsr:194.6 (exception.c) sbepe if (║sctlr & BIT(31))
~ ┌───00012e24: 36f800c2 tbz w2, #31, 12e3c <get_except32_cpsr+0xd8>
│
~ │ ┌─00012e28: 14000001 b 12e2c <get_except32_cpsr+0xc8> <- 00012e24(b.cc-succ)<fallthrough>
│ │
│ │ get_except32_cpsr:195.7 (exception.c) Sbepe new ║|= PSR_AA32_SSBS_BIT;
~ │ └>00012e2c: f94007e8 ldr x8, [sp, #8] <- 00012e28(b)<get_except32_cpsr+0xc8>
~ │ 00012e30: b2690108 orr x8, x8, #0x800000
~ │ 00012e34: f90007e8 str x8, [sp, #8]
│ get_except32_cpsr:195.3 (exception.c) sbepe ║new |= PSR_AA32_SSBS_BIT;
~ │ ┌─00012e38: 14000001 b 12e3c <get_except32_cpsr+0xd8>
│ │
│ │ get_except32_cpsr:200.10 (exception.c) Sbepe new |= (║old & PSR_AA32_PAN_BIT);
~ └>└>00012e3c: f9400be8 ldr x8, [sp, #16] <- 00012e24(b.cc)<get_except32_cpsr+0xd8>,00012e38(b)<get_except32_cpsr+0xd8>
get_except32_cpsr:200.14 (exception.c) sbepe new |= (old ║& PSR_AA32_PAN_BIT);
~ 00012e40: 926a0108 and x8, x8, #0x400000
get_except32_cpsr:200.6 (exception.c) sbepe new ║|= (old & PSR_AA32_PAN_BIT);
~ 00012e44: f94007e9 ldr x9, [sp, #8]
~ 00012e48: aa080128 orr x8, x9, x8
~ 00012e4c: f90007e8 str x8, [sp, #8]
get_except32_cpsr:201.8 (exception.c) Sbepe if (!(║sctlr & BIT(23)))
~ 00012e50: b9401bea ldr w10, [sp, #24]
~ 00012e54: 2a0a03e0 mov w0, w10
get_except32_cpsr:201.6 (exception.c) sbepe if (║!(sctlr & BIT(23)))
~ ┌───00012e58: 37b800c0 tbnz w0, #23, 12e70 <get_except32_cpsr+0x10c>
│
~ │ ┌─00012e5c: 14000001 b 12e60 <get_except32_cpsr+0xfc> <- 00012e58(b.cc-succ)<fallthrough>
│ │
│ │ get_except32_cpsr:202.7 (exception.c) Sbepe new ║|= PSR_AA32_PAN_BIT;
~ │ └>00012e60: f94007e8 ldr x8, [sp, #8] <- 00012e5c(b)<get_except32_cpsr+0xfc>
~ │ 00012e64: b26a0108 orr x8, x8, #0x400000
~ │ 00012e68: f90007e8 str x8, [sp, #8]
│ get_except32_cpsr:202.3 (exception.c) sbepe ║new |= PSR_AA32_PAN_BIT;
~ │ ┌─00012e6c: 14000001 b 12e70 <get_except32_cpsr+0x10c>
│ │
│ │ get_except32_cpsr:209.10 (exception.c) Sbepe new |= (║old & PSR_AA32_GE_MASK);
~ └>└>00012e70: f9400be8 ldr x8, [sp, #16] <- 00012e58(b.cc)<get_except32_cpsr+0x10c>,00012e6c(b)<get_except32_cpsr+0x10c>
get_except32_cpsr:209.14 (exception.c) sbepe new |= (old ║& PSR_AA32_GE_MASK);
~ 00012e74: 92700d08 and x8, x8, #0xf0000
get_except32_cpsr:209.6 (exception.c) sbepe new ║|= (old & PSR_AA32_GE_MASK);
~ 00012e78: f94007e9 ldr x9, [sp, #8]
~ 00012e7c: aa080128 orr x8, x9, x8
~ 00012e80: f90007e8 str x8, [sp, #8]
get_except32_cpsr:217.6 (exception.c) Sbepe if (║sctlr & BIT(25))
~ 00012e84: b9401bea ldr w10, [sp, #24]
~ 00012e88: 2a0a03e0 mov w0, w10
get_except32_cpsr:217.6 (exception.c) sbepe if (║sctlr & BIT(25))
~ ┌───00012e8c: 36c800c0 tbz w0, #25, 12ea4 <get_except32_cpsr+0x140>
│
~ │ ┌─00012e90: 14000001 b 12e94 <get_except32_cpsr+0x130> <- 00012e8c(b.cc-succ)<fallthrough>
│ │
│ │ get_except32_cpsr:218.7 (exception.c) Sbepe new ║|= PSR_AA32_E_BIT;
~ │ └>00012e94: f94007e8 ldr x8, [sp, #8] <- 00012e90(b)<get_except32_cpsr+0x130>
~ │ 00012e98: b2770108 orr x8, x8, #0x200
~ │ 00012e9c: f90007e8 str x8, [sp, #8]
│ get_except32_cpsr:218.3 (exception.c) sbepe ║new |= PSR_AA32_E_BIT;
~ │ ┌─00012ea0: 14000001 b 12ea4 <get_except32_cpsr+0x140>
│ │
│ │ get_except32_cpsr:224.10 (exception.c) Sbepe new |= (║old & PSR_AA32_A_BIT);
~ └>└>00012ea4: f9400be8 ldr x8, [sp, #16] <- 00012e8c(b.cc)<get_except32_cpsr+0x140>,00012ea0(b)<get_except32_cpsr+0x140>
get_except32_cpsr:224.14 (exception.c) sbepe new |= (old ║& PSR_AA32_A_BIT);
~ 00012ea8: 92780108 and x8, x8, #0x100
get_except32_cpsr:224.6 (exception.c) sbepe new ║|= (old & PSR_AA32_A_BIT);
~ 00012eac: f94007e9 ldr x9, [sp, #8]
~ 00012eb0: aa080128 orr x8, x9, x8
~ 00012eb4: f90007e8 str x8, [sp, #8]
get_except32_cpsr:225.6 (exception.c) Sbepe if (║mode != PSR_AA32_MODE_UND && mode != PSR_AA32_MODE_SVC)
~ 00012eb8: b85ec3aa ldur w10, [x29, #-20]
get_except32_cpsr:225.32 (exception.c) sbepe if (mode != PSR_AA32_MODE_UND ║&& mode != PSR_AA32_MODE_SVC)
~ 00012ebc: 71006d4a subs w10, w10, #0x1b
~ ┌─────00012ec0: 54000140 b.eq 12ee8 <get_except32_cpsr+0x184> // b.none
│
~ │ ┌─00012ec4: 14000001 b 12ec8 <get_except32_cpsr+0x164> <- 00012ec0(b.cc-succ)<fallthrough>
│ │
│ │ get_except32_cpsr:225.35 (exception.c) sbepe if (mode != PSR_AA32_MODE_UND && ║mode != PSR_AA32_MODE_SVC)
~ │ └>00012ec8: b85ec3a8 ldur w8, [x29, #-20] <- 00012ec4(b)<get_except32_cpsr+0x164>
│ get_except32_cpsr:225.6 (exception.c) sbepe if (║mode != PSR_AA32_MODE_UND && mode != PSR_AA32_MODE_SVC)
~ │ 00012ecc: 71004d08 subs w8, w8, #0x13
~ │ ┌───00012ed0: 540000c0 b.eq 12ee8 <get_except32_cpsr+0x184> // b.none
│ │
~ │ │ ┌─00012ed4: 14000001 b 12ed8 <get_except32_cpsr+0x174> <- 00012ed0(b.cc-succ)<fallthrough>
│ │ │
│ │ │ get_except32_cpsr:226.7 (exception.c) Sbepe new ║|= PSR_AA32_A_BIT;
~ │ │ └>00012ed8: f94007e8 ldr x8, [sp, #8] <- 00012ed4(b)<get_except32_cpsr+0x174>
~ │ │ 00012edc: b2780108 orr x8, x8, #0x100
~ │ │ 00012ee0: f90007e8 str x8, [sp, #8]
│ │ get_except32_cpsr:226.3 (exception.c) sbepe ║new |= PSR_AA32_A_BIT;
~ │ │ ┌─00012ee4: 14000001 b 12ee8 <get_except32_cpsr+0x184>
│ │ │
│ │ │ get_except32_cpsr:231.6 (exception.c) Sbepe new ║|= PSR_AA32_I_BIT;
~ └>└>└>00012ee8: f94007e8 ldr x8, [sp, #8] <- 00012ec0(b.cc)<get_except32_cpsr+0x184>,00012ed0(b.cc)<get_except32_cpsr+0x184>,00012ee4(b)<get_except32_cpsr+0x184>
~ 00012eec: b2790108 orr x8, x8, #0x80
~ 00012ef0: f90007e8 str x8, [sp, #8]
get_except32_cpsr:237.10 (exception.c) Sbepe new |= (║old & PSR_AA32_F_BIT);
~ 00012ef4: f9400be8 ldr x8, [sp, #16]
get_except32_cpsr:237.14 (exception.c) sbepe new |= (old ║& PSR_AA32_F_BIT);
~ 00012ef8: 927a0108 and x8, x8, #0x40
get_except32_cpsr:237.6 (exception.c) sbepe new ║|= (old & PSR_AA32_F_BIT);
~ 00012efc: f94007e9 ldr x9, [sp, #8]
~ 00012f00: aa080128 orr x8, x9, x8
~ 00012f04: f90007e8 str x8, [sp, #8]
get_except32_cpsr:238.6 (exception.c) Sbepe if (║mode == PSR_AA32_MODE_FIQ)
~ 00012f08: b85ec3aa ldur w10, [x29, #-20]
get_except32_cpsr:238.6 (exception.c) sbepe if (║mode == PSR_AA32_MODE_FIQ)
~ 00012f0c: 7100454a subs w10, w10, #0x11
~ ┌───00012f10: 540000c1 b.ne 12f28 <get_except32_cpsr+0x1c4> // b.any
│
~ │ ┌─00012f14: 14000001 b 12f18 <get_except32_cpsr+0x1b4> <- 00012f10(b.cc-succ)<fallthrough>
│ │
│ │ get_except32_cpsr:239.7 (exception.c) Sbepe new ║|= PSR_AA32_F_BIT;
~ │ └>00012f18: f94007e8 ldr x8, [sp, #8] <- 00012f14(b)<get_except32_cpsr+0x1b4>
~ │ 00012f1c: b27a0108 orr x8, x8, #0x40
~ │ 00012f20: f90007e8 str x8, [sp, #8]
│ get_except32_cpsr:239.3 (exception.c) sbepe ║new |= PSR_AA32_F_BIT;
~ │ ┌─00012f24: 14000001 b 12f28 <get_except32_cpsr+0x1c4>
│ │
│ │ get_except32_cpsr:244.6 (exception.c) Sbepe if (║sctlr & BIT(30))
~ └>└>00012f28: b9401be8 ldr w8, [sp, #24] <- 00012f10(b.cc)<get_except32_cpsr+0x1c4>,00012f24(b)<get_except32_cpsr+0x1c4>
~ 00012f2c: 2a0803e0 mov w0, w8
get_except32_cpsr:244.6 (exception.c) sbepe if (║sctlr & BIT(30))
~ ┌───00012f30: 36f000c0 tbz w0, #30, 12f48 <get_except32_cpsr+0x1e4>
│
~ │ ┌─00012f34: 14000001 b 12f38 <get_except32_cpsr+0x1d4> <- 00012f30(b.cc-succ)<fallthrough>
│ │
│ │ get_except32_cpsr:245.7 (exception.c) Sbepe new ║|= PSR_AA32_T_BIT;
~ │ └>00012f38: f94007e8 ldr x8, [sp, #8] <- 00012f34(b)<get_except32_cpsr+0x1d4>
~ │ 00012f3c: b27b0108 orr x8, x8, #0x20
~ │ 00012f40: f90007e8 str x8, [sp, #8]
│ get_except32_cpsr:245.3 (exception.c) sbepe ║new |= PSR_AA32_T_BIT;
~ │ ┌─00012f44: 14000001 b 12f48 <get_except32_cpsr+0x1e4>
│ │
│ │ get_except32_cpsr:247.9 (exception.c) Sbepe new |= ║mode;
~ └>└>00012f48: b85ec3a8 ldur w8, [x29, #-20] <- 00012f30(b.cc)<get_except32_cpsr+0x1e4>,00012f44(b)<get_except32_cpsr+0x1e4>
~ 00012f4c: 2a0803e9 mov w9, w8
get_except32_cpsr:247.6 (exception.c) sbepe new ║|= mode;
~ 00012f50: f94007ea ldr x10, [sp, #8]
~ 00012f54: aa090149 orr x9, x10, x9
~ 00012f58: f90007e9 str x9, [sp, #8]
get_except32_cpsr:249.9 (exception.c) Sbepe return ║new;
~ 00012f5c: f94007e0 ldr x0, [sp, #8]
get_except32_cpsr:249.2 (exception.c) sbepe ║return new;
~ 00012f60: a9437bfd ldp x29, x30, [sp, #48]
~ 00012f64: 910103ff add sp, sp, #0x40
00012d70 CFA:r29+16 r29:c-16 r30:c-8
~ 00012f68: d65f03c0 ret
-vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x12d64 0x12f6c (DW_OP_fbreg -0x10) get_except32_cpsr:arch/arm64/kvm/hyp/nvhe/../exception.c:172
-mode param typedef(u32=typedef(__u32=unsigned int (base type, DW_ATE_unsigned size:4))) 0x12d64 0x12f6c (DW_OP_fbreg -0x14) get_except32_cpsr:arch/arm64/kvm/hyp/nvhe/../exception.c:172
-sctlr var typedef(u32=typedef(__u32=unsigned int (base type, DW_ATE_unsigned size:4))) 0x12d64 0x12f6c (DW_OP_breg31 0x18) get_except32_cpsr:arch/arm64/kvm/hyp/nvhe/../exception.c:174
-old var long unsigned int (base type, DW_ATE_unsigned size:8) 0x12d64 0x12f6c (DW_OP_breg31 0x10) get_except32_cpsr:arch/arm64/kvm/hyp/nvhe/../exception.c:175
-new var long unsigned int (base type, DW_ATE_unsigned size:8) 0x12d64 0x12f6c (DW_OP_breg31 0x8) get_except32_cpsr:arch/arm64/kvm/hyp/nvhe/../exception.c:175
**00012f6c <__vcpu_write_spsr_abt>:
+ __vcpu_write_spsr_abt params:
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x12f6c 0x12fc4 (DW_OP_fbreg 0x10)
+val param typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x12f6c 0x12fc4 (DW_OP_fbreg 0x8)
__vcpu_write_spsr_abt:45.0 (exception.c) Sbepe ║{
00012f6c CFA:r31
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x12f6c 0x12fc4 (DW_OP_fbreg 0x10) __vcpu_write_spsr_abt:arch/arm64/kvm/hyp/nvhe/../exception.c:44
+val param typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x12f6c 0x12fc4 (DW_OP_fbreg 0x8) __vcpu_write_spsr_abt:arch/arm64/kvm/hyp/nvhe/../exception.c:44
~ 00012f6c: d10083ff sub sp, sp, #0x20 <- 000129ec(bl)<__vcpu_write_spsr_abt>
~ 00012f70: f9000be0 str x0, [sp, #16]
~ 00012f74: f90007e1 str x1, [sp, #8]
~ 00012f78: 2a1f03e8 mov w8, wzr
l: 0x12f7c 0x12f84 has_vhe inlined from __vcpu_write_spsr_abt:46 (exception.c) <d6972>:
l has_vhe:113.3 (virt.h) SbePe ║return false;
~l 00012f7c: 39007fe8 strb w8, [sp, #31]
l has_vhe:116.1 (virt.h) Sbepe ║}
~l 00012f80: 39407fe8 ldrb w8, [sp, #31]
__vcpu_write_spsr_abt:46.6 (exception.c) Sbepe if (║has_vhe())
~ 00012f84: 71000508 subs w8, w8, #0x1
~ ┌──00012f88: 54000121 b.ne 12fac <__vcpu_write_spsr_abt+0x40> // b.any
│
~ │┌─00012f8c: 14000001 b 12f90 <__vcpu_write_spsr_abt+0x24> <- 00012f88(b.cc-succ)<fallthrough>
││
││ __vcpu_write_spsr_abt:47.3 (exception.c) Sbepe ║write_sysreg(val, spsr_abt);
~ ┌┼└>00012f90: 14000001 b 12f94 <__vcpu_write_spsr_abt+0x28> <- 00012f8c(b)<__vcpu_write_spsr_abt+0x24>
││
││ __vcpu_write_spsr_abt:47.3 (exception.c) sbepe ║write_sysreg(val, spsr_abt);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x12f94 0x12fac (DW_OP_fbreg 0x0) lexblock:__vcpu_write_spsr_abt:arch/arm64/kvm/hyp/nvhe/../exception.c:47
~ └┼─>00012f94: f94007e8 ldr x8, [sp, #8] <- 00012f90(b)<__vcpu_write_spsr_abt+0x28>
~ │ 00012f98: f90003e8 str x8, [sp]
~ │ 00012f9c: f94003e8 ldr x8, [sp]
~ │ 00012fa0: d51c4328 msr spsr_abt, x8
~ │┌─00012fa4: 14000001 b 12fa8 <__vcpu_write_spsr_abt+0x3c>
││
~ ┌┼└>00012fa8: 14000005 b 12fbc <__vcpu_write_spsr_abt+0x50> <- 00012fa4(b)<__vcpu_write_spsr_abt+0x3c>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x12f94 0x12fac (DW_OP_fbreg 0x0) lexblock:__vcpu_write_spsr_abt:arch/arm64/kvm/hyp/nvhe/../exception.c:47
││
││ __vcpu_write_spsr_abt:49.30 (exception.c) Sbepe vcpu->arch.ctxt.spsr_abt = ║val;
~ │└─>00012fac: f94007e8 ldr x8, [sp, #8] <- 00012f88(b.cc)<__vcpu_write_spsr_abt+0x40>
│ __vcpu_write_spsr_abt:49.3 (exception.c) sbepe ║vcpu->arch.ctxt.spsr_abt = val;
~ │ 00012fb0: f9400be9 ldr x9, [sp, #16]
│ __vcpu_write_spsr_abt:49.28 (exception.c) sbepe vcpu->arch.ctxt.spsr_abt ║= val;
~ │ 00012fb4: f9013928 str x8, [x9, #624]
~ │ ┌─00012fb8: 14000001 b 12fbc <__vcpu_write_spsr_abt+0x50>
│ │
│ │ __vcpu_write_spsr_abt:50.1 (exception.c) Sbepe ║}
~ └>└>00012fbc: 910083ff add sp, sp, #0x20 <- 00012fa8(b)<__vcpu_write_spsr_abt+0x50>,00012fb8(b)<__vcpu_write_spsr_abt+0x50>
00012f70 CFA:r31+32
~ 00012fc0: d65f03c0 ret
-vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x12f6c 0x12fc4 (DW_OP_fbreg 0x10) __vcpu_write_spsr_abt:arch/arm64/kvm/hyp/nvhe/../exception.c:44
-val param typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x12f6c 0x12fc4 (DW_OP_fbreg 0x8) __vcpu_write_spsr_abt:arch/arm64/kvm/hyp/nvhe/../exception.c:44
**00012fc4 <host_spsr_to_spsr32>:
+ host_spsr_to_spsr32 params:
+spsr param long unsigned int (base type, DW_ATE_unsigned size:8) 0x12fc4 0x13010 (DW_OP_fbreg 0x18)
host_spsr_to_spsr32:197.0 (kvm_emulate.h) Sbepe ║{
00012fc4 CFA:r31
+spsr param long unsigned int (base type, DW_ATE_unsigned size:8) 0x12fc4 0x13010 (DW_OP_fbreg 0x18) host_spsr_to_spsr32:arch/arm64/kvm/hyp/nvhe/../exception.c:196
+overlap var const(long unsigned int (base type, DW_ATE_unsigned size:8)) 0x12fc4 0x13010 (DW_OP_fbreg 0x10) host_spsr_to_spsr32:arch/arm64/kvm/hyp/nvhe/../exception.c:198
+dit var long unsigned int (base type, DW_ATE_unsigned size:8) 0x12fc4 0x13010 (DW_OP_fbreg 0x8) host_spsr_to_spsr32:arch/arm64/kvm/hyp/nvhe/../exception.c:199
~ 00012fc4: d10083ff sub sp, sp, #0x20 <- 000129d8(bl)<host_spsr_to_spsr32>,00012a14(bl)<host_spsr_to_spsr32>
~ 00012fc8: f9000fe0 str x0, [sp, #24]
~ 00012fcc: 52a02408 mov w8, #0x1200000 // #18874368
~ 00012fd0: 2a0803e9 mov w9, w8
host_spsr_to_spsr32:198.22 (kvm_emulate.h) SbePe const unsigned long ║overlap = BIT(24) | BIT(21);
~ 00012fd4: f9000be9 str x9, [sp, #16]
host_spsr_to_spsr32:199.25 (kvm_emulate.h) Sbepe unsigned long dit = !!(║spsr & PSR_AA32_DIT_BIT);
~ 00012fd8: f9400fe9 ldr x9, [sp, #24]
host_spsr_to_spsr32:199.23 (kvm_emulate.h) sbepe unsigned long dit = !║!(spsr & PSR_AA32_DIT_BIT);
~ 00012fdc: d3586129 ubfx x9, x9, #24, #1
host_spsr_to_spsr32:199.16 (kvm_emulate.h) sbepe unsigned long ║dit = !!(spsr & PSR_AA32_DIT_BIT);
~ 00012fe0: f90007e9 str x9, [sp, #8]
host_spsr_to_spsr32:201.7 (kvm_emulate.h) Sbepe spsr ║&= ~overlap;
~ 00012fe4: f9400fe9 ldr x9, [sp, #24]
~ 00012fe8: 92a0240a mov x10, #0xfffffffffedfffff // #-18874369
~ 00012fec: 8a0a0129 and x9, x9, x10
~ 00012ff0: f9000fe9 str x9, [sp, #24]
host_spsr_to_spsr32:203.10 (kvm_emulate.h) Sbepe spsr |= ║dit << 21;
~ 00012ff4: f94007e9 ldr x9, [sp, #8]
host_spsr_to_spsr32:203.7 (kvm_emulate.h) sbepe spsr ║|= dit << 21;
~ 00012ff8: f9400fea ldr x10, [sp, #24]
~ 00012ffc: aa095549 orr x9, x10, x9, lsl #21
~ 00013000: f9000fe9 str x9, [sp, #24]
host_spsr_to_spsr32:205.9 (kvm_emulate.h) Sbepe return ║spsr;
~ 00013004: f9400fe0 ldr x0, [sp, #24]
host_spsr_to_spsr32:205.2 (kvm_emulate.h) sbepe ║return spsr;
~ 00013008: 910083ff add sp, sp, #0x20
00012fc8 CFA:r31+32
~ 0001300c: d65f03c0 ret
-spsr param long unsigned int (base type, DW_ATE_unsigned size:8) 0x12fc4 0x13010 (DW_OP_fbreg 0x18) host_spsr_to_spsr32:arch/arm64/kvm/hyp/nvhe/../exception.c:196
-overlap var const(long unsigned int (base type, DW_ATE_unsigned size:8)) 0x12fc4 0x13010 (DW_OP_fbreg 0x10) host_spsr_to_spsr32:arch/arm64/kvm/hyp/nvhe/../exception.c:198
-dit var long unsigned int (base type, DW_ATE_unsigned size:8) 0x12fc4 0x13010 (DW_OP_fbreg 0x8) host_spsr_to_spsr32:arch/arm64/kvm/hyp/nvhe/../exception.c:199
**00013010 <__vcpu_write_spsr_und>:
+ __vcpu_write_spsr_und params:
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x13010 0x13068 (DW_OP_fbreg 0x10)
+val param typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13010 0x13068 (DW_OP_fbreg 0x8)
__vcpu_write_spsr_und:53.0 (exception.c) Sbepe ║{
00013010 CFA:r31
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x13010 0x13068 (DW_OP_fbreg 0x10) __vcpu_write_spsr_und:arch/arm64/kvm/hyp/nvhe/../exception.c:52
+val param typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13010 0x13068 (DW_OP_fbreg 0x8) __vcpu_write_spsr_und:arch/arm64/kvm/hyp/nvhe/../exception.c:52
~ 00013010: d10083ff sub sp, sp, #0x20 <- 00012a28(bl)<__vcpu_write_spsr_und>
~ 00013014: f9000be0 str x0, [sp, #16]
~ 00013018: f90007e1 str x1, [sp, #8]
~ 0001301c: 2a1f03e8 mov w8, wzr
m: 0x13020 0x13028 has_vhe inlined from __vcpu_write_spsr_und:54 (exception.c) <d6a18>:
m has_vhe:113.3 (virt.h) SbePe ║return false;
~m 00013020: 39007fe8 strb w8, [sp, #31]
m has_vhe:116.1 (virt.h) Sbepe ║}
~m 00013024: 39407fe8 ldrb w8, [sp, #31]
__vcpu_write_spsr_und:54.6 (exception.c) Sbepe if (║has_vhe())
~ 00013028: 71000508 subs w8, w8, #0x1
~ ┌──0001302c: 54000121 b.ne 13050 <__vcpu_write_spsr_und+0x40> // b.any
│
~ │┌─00013030: 14000001 b 13034 <__vcpu_write_spsr_und+0x24> <- 0001302c(b.cc-succ)<fallthrough>
││
││ __vcpu_write_spsr_und:55.3 (exception.c) Sbepe ║write_sysreg(val, spsr_und);
~ ┌┼└>00013034: 14000001 b 13038 <__vcpu_write_spsr_und+0x28> <- 00013030(b)<__vcpu_write_spsr_und+0x24>
││
││ __vcpu_write_spsr_und:55.3 (exception.c) sbepe ║write_sysreg(val, spsr_und);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13038 0x13050 (DW_OP_fbreg 0x0) lexblock:__vcpu_write_spsr_und:arch/arm64/kvm/hyp/nvhe/../exception.c:55
~ └┼─>00013038: f94007e8 ldr x8, [sp, #8] <- 00013034(b)<__vcpu_write_spsr_und+0x28>
~ │ 0001303c: f90003e8 str x8, [sp]
~ │ 00013040: f94003e8 ldr x8, [sp]
~ │ 00013044: d51c4348 msr spsr_und, x8
~ │┌─00013048: 14000001 b 1304c <__vcpu_write_spsr_und+0x3c>
││
~ ┌┼└>0001304c: 14000005 b 13060 <__vcpu_write_spsr_und+0x50> <- 00013048(b)<__vcpu_write_spsr_und+0x3c>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13038 0x13050 (DW_OP_fbreg 0x0) lexblock:__vcpu_write_spsr_und:arch/arm64/kvm/hyp/nvhe/../exception.c:55
││
││ __vcpu_write_spsr_und:57.30 (exception.c) Sbepe vcpu->arch.ctxt.spsr_und = ║val;
~ │└─>00013050: f94007e8 ldr x8, [sp, #8] <- 0001302c(b.cc)<__vcpu_write_spsr_und+0x40>
│ __vcpu_write_spsr_und:57.3 (exception.c) sbepe ║vcpu->arch.ctxt.spsr_und = val;
~ │ 00013054: f9400be9 ldr x9, [sp, #16]
│ __vcpu_write_spsr_und:57.28 (exception.c) sbepe vcpu->arch.ctxt.spsr_und ║= val;
~ │ 00013058: f9013d28 str x8, [x9, #632]
~ │ ┌─0001305c: 14000001 b 13060 <__vcpu_write_spsr_und+0x50>
│ │
│ │ __vcpu_write_spsr_und:58.1 (exception.c) Sbepe ║}
~ └>└>00013060: 910083ff add sp, sp, #0x20 <- 0001304c(b)<__vcpu_write_spsr_und+0x50>,0001305c(b)<__vcpu_write_spsr_und+0x50>
00013014 CFA:r31+32
~ 00013064: d65f03c0 ret
-vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x13010 0x13068 (DW_OP_fbreg 0x10) __vcpu_write_spsr_und:arch/arm64/kvm/hyp/nvhe/../exception.c:52
-val param typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13010 0x13068 (DW_OP_fbreg 0x8) __vcpu_write_spsr_und:arch/arm64/kvm/hyp/nvhe/../exception.c:52
**00013068 <__vcpu_read_sys_reg_from_cpu>:
+ __vcpu_read_sys_reg_from_cpu params:
+reg param int (base type, DW_ATE_signed size:4) 0x13068 0x133e8 (DW_OP_fbreg 0x198)
+val param pointer(typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8)))) 0x13068 0x133e8 (DW_OP_fbreg 0x190)
__vcpu_read_sys_reg_from_cpu:459.0 (kvm_host.h) Sbepe ║{
+reg param int (base type, DW_ATE_signed size:4) 0x13068 0x133e8 (DW_OP_fbreg 0x198) __vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:458
+val param pointer(typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8)))) 0x13068 0x133e8 (DW_OP_fbreg 0x190) __vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:458
~ 00013068: d106c3ff sub sp, sp, #0x1b0 <- 00012d24(bl)<__vcpu_read_sys_reg_from_cpu>
00013068 CFA:r31 r29:u
~ 0001306c: f900d3fd str x29, [sp, #416]
~ 00013070: b9019be0 str w0, [sp, #408]
~ 00013074: f900cbe1 str x1, [sp, #400]
~ 00013078: 2a1f03e8 mov w8, wzr
n: 0x1307c 0x13084 has_vhe inlined from __vcpu_read_sys_reg_from_cpu:471 (kvm_host.h) <d6a83>:
n has_vhe:113.3 (virt.h) SbePe ║return false;
~n 0001307c: 39067fe8 strb w8, [sp, #415]
n has_vhe:116.1 (virt.h) Sbepe ║}
~n 00013080: 39467fe8 ldrb w8, [sp, #415]
__vcpu_read_sys_reg_from_cpu:471.6 (kvm_host.h) Sbepe if (║!has_vhe())
~ ┌──00013084: 370000a8 tbnz w8, #0, 13098 <__vcpu_read_sys_reg_from_cpu+0x30>
│
~ │┌─00013088: 14000001 b 1308c <__vcpu_read_sys_reg_from_cpu+0x24> <- 00013084(b.cc-succ)<fallthrough>
││
~ │└>0001308c: 2a1f03e8 mov w8, wzr <- 00013088(b)<__vcpu_read_sys_reg_from_cpu+0x24>
│ __vcpu_read_sys_reg_from_cpu:472.3 (kvm_host.h) Sbepe ║return false;
~ │ 00013090: 39067be8 strb w8, [sp, #414]
~ ┌────────────────────────────────────────────┼──00013094: 140000d1 b 133d8 <__vcpu_read_sys_reg_from_cpu+0x370>
│ │
│ │ __vcpu_read_sys_reg_from_cpu:474.10 (kvm_host.h) Sbepe switch (║reg) {
~ │ └─>00013098: b9419be8 ldr w8, [sp, #408] <- 00013084(b.cc)<__vcpu_read_sys_reg_from_cpu+0x30>
│ __vcpu_read_sys_reg_from_cpu:474.2 (kvm_host.h) sbepe ║switch (reg) {
~ │ 0001309c: 71000908 subs w8, w8, #0x2
~ │ 000130a0: 2a0803e9 mov w9, w8
~ │ 000130a4: 7101d108 subs w8, w8, #0x74
~ │ 000130a8: f90007e9 str x9, [sp, #8]
~ │ ┌──000130ac: 540018a8 b.hi 133c0 <__vcpu_read_sys_reg_from_cpu+0x358> // b.pmore
│ │
~ │ │ 000130b0: 90000028 adrp x8, 17000 <___kvm_hyp_init+0x3c> <- 000130ac(b.cc-succ)<fallthrough>
~ │ │ 000130b4: 913eb108 add x8, x8, #0xfac
~ │ │ 000130b8: f94007eb ldr x11, [sp, #8]
~ │ │ 000130bc: b8ab790a ldrsw x10, [x8, x11, lsl #2]
~ │ │ 000130c0: 8b0a0109 add x9, x8, x10
│ │
~ │ │ X000130c4: d61f0120 br x9 -> 000130c4<indirect0> <- 000130c4(br)<indirect0>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x130c8 0x130dc (DW_OP_fbreg 0x188) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:475
~ │ │ 000130c8: d53a0008 mrs x8, csselr_el1
│ │ __vcpu_read_sys_reg_from_cpu:475.26 (kvm_host.h) Sbepe case CSSELR_EL1: *val = ║read_sysreg_s(SYS_CSSELR_EL1); break;
~ │ │ 000130cc: f900c7e8 str x8, [sp, #392]
~ │ │ 000130d0: f940c7e8 ldr x8, [sp, #392]
~ │ │ 000130d4: f900c3e8 str x8, [sp, #384]
~ │ │ 000130d8: f940c3e8 ldr x8, [sp, #384]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x130c8 0x130dc (DW_OP_fbreg 0x188) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:475
│ │ __vcpu_read_sys_reg_from_cpu:475.20 (kvm_host.h) sbepe case CSSELR_EL1: *║val = read_sysreg_s(SYS_CSSELR_EL1); break;
~ │ │ 000130dc: f940cbe9 ldr x9, [sp, #400]
│ │ __vcpu_read_sys_reg_from_cpu:475.24 (kvm_host.h) sbepe case CSSELR_EL1: *val ║= read_sysreg_s(SYS_CSSELR_EL1); break;
~ │ │ 000130e0: f9000128 str x8, [x9]
│ │ __vcpu_read_sys_reg_from_cpu:475.57 (kvm_host.h) sbepe case CSSELR_EL1: *val = read_sysreg_s(SYS_CSSELR_EL1); ║break;
~ │┌───────────────────────────────────────────┼──000130e4: 140000ba b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x130e8 0x130fc (DW_OP_fbreg 0x178) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:476
~ ││ │ 000130e8: d53d1008 mrs x8, sctlr_el12
││ │ __vcpu_read_sys_reg_from_cpu:476.26 (kvm_host.h) Sbepe case SCTLR_EL1: *val = ║read_sysreg_s(SYS_SCTLR_EL12); break;
~ ││ │ 000130ec: f900bfe8 str x8, [sp, #376]
~ ││ │ 000130f0: f940bfe8 ldr x8, [sp, #376]
~ ││ │ 000130f4: f900bbe8 str x8, [sp, #368]
~ ││ │ 000130f8: f940bbe8 ldr x8, [sp, #368]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x130e8 0x130fc (DW_OP_fbreg 0x178) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:476
││ │ __vcpu_read_sys_reg_from_cpu:476.20 (kvm_host.h) sbepe case SCTLR_EL1: *║val = read_sysreg_s(SYS_SCTLR_EL12); break;
~ ││ │ 000130fc: f940cbe9 ldr x9, [sp, #400]
││ │ __vcpu_read_sys_reg_from_cpu:476.24 (kvm_host.h) sbepe case SCTLR_EL1: *val ║= read_sysreg_s(SYS_SCTLR_EL12); break;
~ ││ │ 00013100: f9000128 str x8, [x9]
││ │ __vcpu_read_sys_reg_from_cpu:476.57 (kvm_host.h) sbepe case SCTLR_EL1: *val = read_sysreg_s(SYS_SCTLR_EL12); ║break;
~ ││ ┌─────────────────────────────────────────┼──00013104: 140000b2 b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13108 0x1311c (DW_OP_fbreg 0x168) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:477
~ ││ │ │ 00013108: d53d1048 mrs x8, cpacr_el12
││ │ │ __vcpu_read_sys_reg_from_cpu:477.26 (kvm_host.h) Sbepe case CPACR_EL1: *val = ║read_sysreg_s(SYS_CPACR_EL12); break;
~ ││ │ │ 0001310c: f900b7e8 str x8, [sp, #360]
~ ││ │ │ 00013110: f940b7e8 ldr x8, [sp, #360]
~ ││ │ │ 00013114: f900b3e8 str x8, [sp, #352]
~ ││ │ │ 00013118: f940b3e8 ldr x8, [sp, #352]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13108 0x1311c (DW_OP_fbreg 0x168) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:477
││ │ │ __vcpu_read_sys_reg_from_cpu:477.20 (kvm_host.h) sbepe case CPACR_EL1: *║val = read_sysreg_s(SYS_CPACR_EL12); break;
~ ││ │ │ 0001311c: f940cbe9 ldr x9, [sp, #400]
││ │ │ __vcpu_read_sys_reg_from_cpu:477.24 (kvm_host.h) sbepe case CPACR_EL1: *val ║= read_sysreg_s(SYS_CPACR_EL12); break;
~ ││ │ │ 00013120: f9000128 str x8, [x9]
││ │ │ __vcpu_read_sys_reg_from_cpu:477.57 (kvm_host.h) sbepe case CPACR_EL1: *val = read_sysreg_s(SYS_CPACR_EL12); ║break;
~ ││ │ ┌───────────────────────────────────────┼──00013124: 140000aa b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13128 0x1313c (DW_OP_fbreg 0x158) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:478
~ ││ │ │ │ 00013128: d53d2008 mrs x8, ttbr0_el12
││ │ │ │ __vcpu_read_sys_reg_from_cpu:478.26 (kvm_host.h) Sbepe case TTBR0_EL1: *val = ║read_sysreg_s(SYS_TTBR0_EL12); break;
~ ││ │ │ │ 0001312c: f900afe8 str x8, [sp, #344]
~ ││ │ │ │ 00013130: f940afe8 ldr x8, [sp, #344]
~ ││ │ │ │ 00013134: f900abe8 str x8, [sp, #336]
~ ││ │ │ │ 00013138: f940abe8 ldr x8, [sp, #336]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13128 0x1313c (DW_OP_fbreg 0x158) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:478
││ │ │ │ __vcpu_read_sys_reg_from_cpu:478.20 (kvm_host.h) sbepe case TTBR0_EL1: *║val = read_sysreg_s(SYS_TTBR0_EL12); break;
~ ││ │ │ │ 0001313c: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ __vcpu_read_sys_reg_from_cpu:478.24 (kvm_host.h) sbepe case TTBR0_EL1: *val ║= read_sysreg_s(SYS_TTBR0_EL12); break;
~ ││ │ │ │ 00013140: f9000128 str x8, [x9]
││ │ │ │ __vcpu_read_sys_reg_from_cpu:478.57 (kvm_host.h) sbepe case TTBR0_EL1: *val = read_sysreg_s(SYS_TTBR0_EL12); ║break;
~ ││ │ │ ┌─────────────────────────────────────┼──00013144: 140000a2 b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13148 0x1315c (DW_OP_fbreg 0x148) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:479
~ ││ │ │ │ │ 00013148: d53d2028 mrs x8, ttbr1_el12
││ │ │ │ │ __vcpu_read_sys_reg_from_cpu:479.26 (kvm_host.h) Sbepe case TTBR1_EL1: *val = ║read_sysreg_s(SYS_TTBR1_EL12); break;
~ ││ │ │ │ │ 0001314c: f900a7e8 str x8, [sp, #328]
~ ││ │ │ │ │ 00013150: f940a7e8 ldr x8, [sp, #328]
~ ││ │ │ │ │ 00013154: f900a3e8 str x8, [sp, #320]
~ ││ │ │ │ │ 00013158: f940a3e8 ldr x8, [sp, #320]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13148 0x1315c (DW_OP_fbreg 0x148) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:479
││ │ │ │ │ __vcpu_read_sys_reg_from_cpu:479.20 (kvm_host.h) sbepe case TTBR1_EL1: *║val = read_sysreg_s(SYS_TTBR1_EL12); break;
~ ││ │ │ │ │ 0001315c: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ __vcpu_read_sys_reg_from_cpu:479.24 (kvm_host.h) sbepe case TTBR1_EL1: *val ║= read_sysreg_s(SYS_TTBR1_EL12); break;
~ ││ │ │ │ │ 00013160: f9000128 str x8, [x9]
││ │ │ │ │ __vcpu_read_sys_reg_from_cpu:479.57 (kvm_host.h) sbepe case TTBR1_EL1: *val = read_sysreg_s(SYS_TTBR1_EL12); ║break;
~ ││ │ │ │ ┌───────────────────────────────────┼──00013164: 1400009a b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13168 0x1317c (DW_OP_fbreg 0x138) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:480
~ ││ │ │ │ │ │ 00013168: d53d2048 mrs x8, tcr_el12
││ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:480.24 (kvm_host.h) Sbepe case TCR_EL1: *val = ║read_sysreg_s(SYS_TCR_EL12); break;
~ ││ │ │ │ │ │ 0001316c: f9009fe8 str x8, [sp, #312]
~ ││ │ │ │ │ │ 00013170: f9409fe8 ldr x8, [sp, #312]
~ ││ │ │ │ │ │ 00013174: f9009be8 str x8, [sp, #304]
~ ││ │ │ │ │ │ 00013178: f9409be8 ldr x8, [sp, #304]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13168 0x1317c (DW_OP_fbreg 0x138) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:480
││ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:480.18 (kvm_host.h) sbepe case TCR_EL1: *║val = read_sysreg_s(SYS_TCR_EL12); break;
~ ││ │ │ │ │ │ 0001317c: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:480.22 (kvm_host.h) sbepe case TCR_EL1: *val ║= read_sysreg_s(SYS_TCR_EL12); break;
~ ││ │ │ │ │ │ 00013180: f9000128 str x8, [x9]
││ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:480.53 (kvm_host.h) sbepe case TCR_EL1: *val = read_sysreg_s(SYS_TCR_EL12); ║break;
~ ││ │ │ │ │ ┌─────────────────────────────────┼──00013184: 14000092 b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13188 0x1319c (DW_OP_fbreg 0x128) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:481
~ ││ │ │ │ │ │ │ 00013188: d53d5208 mrs x8, esr_el12
││ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:481.24 (kvm_host.h) Sbepe case ESR_EL1: *val = ║read_sysreg_s(SYS_ESR_EL12); break;
~ ││ │ │ │ │ │ │ 0001318c: f90097e8 str x8, [sp, #296]
~ ││ │ │ │ │ │ │ 00013190: f94097e8 ldr x8, [sp, #296]
~ ││ │ │ │ │ │ │ 00013194: f90093e8 str x8, [sp, #288]
~ ││ │ │ │ │ │ │ 00013198: f94093e8 ldr x8, [sp, #288]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13188 0x1319c (DW_OP_fbreg 0x128) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:481
││ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:481.18 (kvm_host.h) sbepe case ESR_EL1: *║val = read_sysreg_s(SYS_ESR_EL12); break;
~ ││ │ │ │ │ │ │ 0001319c: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:481.22 (kvm_host.h) sbepe case ESR_EL1: *val ║= read_sysreg_s(SYS_ESR_EL12); break;
~ ││ │ │ │ │ │ │ 000131a0: f9000128 str x8, [x9]
││ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:481.53 (kvm_host.h) sbepe case ESR_EL1: *val = read_sysreg_s(SYS_ESR_EL12); ║break;
~ ││ │ │ │ │ │ ┌───────────────────────────────┼──000131a4: 1400008a b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x131a8 0x131bc (DW_OP_fbreg 0x118) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:482
~ ││ │ │ │ │ │ │ │ 000131a8: d53d5108 mrs x8, afsr0_el12
││ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:482.26 (kvm_host.h) Sbepe case AFSR0_EL1: *val = ║read_sysreg_s(SYS_AFSR0_EL12); break;
~ ││ │ │ │ │ │ │ │ 000131ac: f9008fe8 str x8, [sp, #280]
~ ││ │ │ │ │ │ │ │ 000131b0: f9408fe8 ldr x8, [sp, #280]
~ ││ │ │ │ │ │ │ │ 000131b4: f9008be8 str x8, [sp, #272]
~ ││ │ │ │ │ │ │ │ 000131b8: f9408be8 ldr x8, [sp, #272]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x131a8 0x131bc (DW_OP_fbreg 0x118) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:482
││ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:482.20 (kvm_host.h) sbepe case AFSR0_EL1: *║val = read_sysreg_s(SYS_AFSR0_EL12); break;
~ ││ │ │ │ │ │ │ │ 000131bc: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:482.24 (kvm_host.h) sbepe case AFSR0_EL1: *val ║= read_sysreg_s(SYS_AFSR0_EL12); break;
~ ││ │ │ │ │ │ │ │ 000131c0: f9000128 str x8, [x9]
││ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:482.57 (kvm_host.h) sbepe case AFSR0_EL1: *val = read_sysreg_s(SYS_AFSR0_EL12); ║break;
~ ││ │ │ │ │ │ │ ┌─────────────────────────────┼──000131c4: 14000082 b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x131c8 0x131dc (DW_OP_fbreg 0x108) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:483
~ ││ │ │ │ │ │ │ │ │ 000131c8: d53d5128 mrs x8, afsr1_el12
││ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:483.26 (kvm_host.h) Sbepe case AFSR1_EL1: *val = ║read_sysreg_s(SYS_AFSR1_EL12); break;
~ ││ │ │ │ │ │ │ │ │ 000131cc: f90087e8 str x8, [sp, #264]
~ ││ │ │ │ │ │ │ │ │ 000131d0: f94087e8 ldr x8, [sp, #264]
~ ││ │ │ │ │ │ │ │ │ 000131d4: f90083e8 str x8, [sp, #256]
~ ││ │ │ │ │ │ │ │ │ 000131d8: f94083e8 ldr x8, [sp, #256]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x131c8 0x131dc (DW_OP_fbreg 0x108) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:483
││ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:483.20 (kvm_host.h) sbepe case AFSR1_EL1: *║val = read_sysreg_s(SYS_AFSR1_EL12); break;
~ ││ │ │ │ │ │ │ │ │ 000131dc: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:483.24 (kvm_host.h) sbepe case AFSR1_EL1: *val ║= read_sysreg_s(SYS_AFSR1_EL12); break;
~ ││ │ │ │ │ │ │ │ │ 000131e0: f9000128 str x8, [x9]
││ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:483.57 (kvm_host.h) sbepe case AFSR1_EL1: *val = read_sysreg_s(SYS_AFSR1_EL12); ║break;
~ ││ │ │ │ │ │ │ │ ┌───────────────────────────┼──000131e4: 1400007a b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x131e8 0x131fc (DW_OP_fbreg 0xf8) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:484
~ ││ │ │ │ │ │ │ │ │ │ 000131e8: d53d6008 mrs x8, far_el12
││ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:484.24 (kvm_host.h) Sbepe case FAR_EL1: *val = ║read_sysreg_s(SYS_FAR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ 000131ec: f9007fe8 str x8, [sp, #248]
~ ││ │ │ │ │ │ │ │ │ │ 000131f0: f9407fe8 ldr x8, [sp, #248]
~ ││ │ │ │ │ │ │ │ │ │ 000131f4: f9007be8 str x8, [sp, #240]
~ ││ │ │ │ │ │ │ │ │ │ 000131f8: f9407be8 ldr x8, [sp, #240]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x131e8 0x131fc (DW_OP_fbreg 0xf8) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:484
││ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:484.18 (kvm_host.h) sbepe case FAR_EL1: *║val = read_sysreg_s(SYS_FAR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ 000131fc: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:484.22 (kvm_host.h) sbepe case FAR_EL1: *val ║= read_sysreg_s(SYS_FAR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ 00013200: f9000128 str x8, [x9]
││ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:484.53 (kvm_host.h) sbepe case FAR_EL1: *val = read_sysreg_s(SYS_FAR_EL12); ║break;
~ ││ │ │ │ │ │ │ │ │ ┌─────────────────────────┼──00013204: 14000072 b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13208 0x1321c (DW_OP_fbreg 0xe8) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:485
~ ││ │ │ │ │ │ │ │ │ │ │ 00013208: d53da208 mrs x8, mair_el12
││ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:485.25 (kvm_host.h) Sbepe case MAIR_EL1: *val = ║read_sysreg_s(SYS_MAIR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ 0001320c: f90077e8 str x8, [sp, #232]
~ ││ │ │ │ │ │ │ │ │ │ │ 00013210: f94077e8 ldr x8, [sp, #232]
~ ││ │ │ │ │ │ │ │ │ │ │ 00013214: f90073e8 str x8, [sp, #224]
~ ││ │ │ │ │ │ │ │ │ │ │ 00013218: f94073e8 ldr x8, [sp, #224]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13208 0x1321c (DW_OP_fbreg 0xe8) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:485
││ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:485.19 (kvm_host.h) sbepe case MAIR_EL1: *║val = read_sysreg_s(SYS_MAIR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ 0001321c: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:485.23 (kvm_host.h) sbepe case MAIR_EL1: *val ║= read_sysreg_s(SYS_MAIR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ 00013220: f9000128 str x8, [x9]
││ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:485.55 (kvm_host.h) sbepe case MAIR_EL1: *val = read_sysreg_s(SYS_MAIR_EL12); ║break;
~ ││ │ │ │ │ │ │ │ │ │ ┌───────────────────────┼──00013224: 1400006a b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13228 0x1323c (DW_OP_fbreg 0xd8) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:486
~ ││ │ │ │ │ │ │ │ │ │ │ │ 00013228: d53dc008 mrs x8, vbar_el12
││ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:486.25 (kvm_host.h) Sbepe case VBAR_EL1: *val = ║read_sysreg_s(SYS_VBAR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ 0001322c: f9006fe8 str x8, [sp, #216]
~ ││ │ │ │ │ │ │ │ │ │ │ │ 00013230: f9406fe8 ldr x8, [sp, #216]
~ ││ │ │ │ │ │ │ │ │ │ │ │ 00013234: f9006be8 str x8, [sp, #208]
~ ││ │ │ │ │ │ │ │ │ │ │ │ 00013238: f9406be8 ldr x8, [sp, #208]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13228 0x1323c (DW_OP_fbreg 0xd8) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:486
││ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:486.19 (kvm_host.h) sbepe case VBAR_EL1: *║val = read_sysreg_s(SYS_VBAR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ 0001323c: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:486.23 (kvm_host.h) sbepe case VBAR_EL1: *val ║= read_sysreg_s(SYS_VBAR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ 00013240: f9000128 str x8, [x9]
││ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:486.55 (kvm_host.h) sbepe case VBAR_EL1: *val = read_sysreg_s(SYS_VBAR_EL12); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ ┌─────────────────────┼──00013244: 14000062 b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13248 0x1325c (DW_OP_fbreg 0xc8) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:487
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ 00013248: d53dd028 mrs x8, contextidr_el12
││ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:487.30 (kvm_host.h) Sbepe case CONTEXTIDR_EL1: *val = ║read_sysreg_s(SYS_CONTEXTIDR_EL12);break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ 0001324c: f90067e8 str x8, [sp, #200]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ 00013250: f94067e8 ldr x8, [sp, #200]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ 00013254: f90063e8 str x8, [sp, #192]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ 00013258: f94063e8 ldr x8, [sp, #192]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13248 0x1325c (DW_OP_fbreg 0xc8) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:487
││ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:487.24 (kvm_host.h) sbepe case CONTEXTIDR_EL1: *║val = read_sysreg_s(SYS_CONTEXTIDR_EL12);break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ 0001325c: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:487.28 (kvm_host.h) sbepe case CONTEXTIDR_EL1: *val ║= read_sysreg_s(SYS_CONTEXTIDR_EL12);break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ 00013260: f9000128 str x8, [x9]
││ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:487.65 (kvm_host.h) sbepe case CONTEXTIDR_EL1: *val = read_sysreg_s(SYS_CONTEXTIDR_EL12);║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ ┌───────────────────┼──00013264: 1400005a b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13268 0x1327c (DW_OP_fbreg 0xb8) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:488
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013268: d53bd048 mrs x8, tpidr_el0
││ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:488.26 (kvm_host.h) Sbepe case TPIDR_EL0: *val = ║read_sysreg_s(SYS_TPIDR_EL0); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001326c: f9005fe8 str x8, [sp, #184]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013270: f9405fe8 ldr x8, [sp, #184]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013274: f9005be8 str x8, [sp, #176]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013278: f9405be8 ldr x8, [sp, #176]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13268 0x1327c (DW_OP_fbreg 0xb8) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:488
││ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:488.20 (kvm_host.h) sbepe case TPIDR_EL0: *║val = read_sysreg_s(SYS_TPIDR_EL0); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001327c: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:488.24 (kvm_host.h) sbepe case TPIDR_EL0: *val ║= read_sysreg_s(SYS_TPIDR_EL0); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013280: f9000128 str x8, [x9]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:488.56 (kvm_host.h) sbepe case TPIDR_EL0: *val = read_sysreg_s(SYS_TPIDR_EL0); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ ┌─────────────────┼──00013284: 14000052 b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13288 0x1329c (DW_OP_fbreg 0xa8) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:489
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013288: d53bd068 mrs x8, tpidrro_el0
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:489.27 (kvm_host.h) Sbepe case TPIDRRO_EL0: *val = ║read_sysreg_s(SYS_TPIDRRO_EL0); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001328c: f90057e8 str x8, [sp, #168]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013290: f94057e8 ldr x8, [sp, #168]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013294: f90053e8 str x8, [sp, #160]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013298: f94053e8 ldr x8, [sp, #160]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13288 0x1329c (DW_OP_fbreg 0xa8) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:489
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:489.21 (kvm_host.h) sbepe case TPIDRRO_EL0: *║val = read_sysreg_s(SYS_TPIDRRO_EL0); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001329c: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:489.25 (kvm_host.h) sbepe case TPIDRRO_EL0: *val ║= read_sysreg_s(SYS_TPIDRRO_EL0); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132a0: f9000128 str x8, [x9]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:489.59 (kvm_host.h) sbepe case TPIDRRO_EL0: *val = read_sysreg_s(SYS_TPIDRRO_EL0); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌───────────────┼──000132a4: 1400004a b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x132a8 0x132bc (DW_OP_fbreg 0x98) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:490
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132a8: d538d088 mrs x8, tpidr_el1
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:490.26 (kvm_host.h) Sbepe case TPIDR_EL1: *val = ║read_sysreg_s(SYS_TPIDR_EL1); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132ac: f9004fe8 str x8, [sp, #152]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132b0: f9404fe8 ldr x8, [sp, #152]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132b4: f9004be8 str x8, [sp, #144]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132b8: f9404be8 ldr x8, [sp, #144]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x132a8 0x132bc (DW_OP_fbreg 0x98) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:490
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:490.20 (kvm_host.h) sbepe case TPIDR_EL1: *║val = read_sysreg_s(SYS_TPIDR_EL1); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132bc: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:490.24 (kvm_host.h) sbepe case TPIDR_EL1: *val ║= read_sysreg_s(SYS_TPIDR_EL1); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132c0: f9000128 str x8, [x9]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:490.56 (kvm_host.h) sbepe case TPIDR_EL1: *val = read_sysreg_s(SYS_TPIDR_EL1); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌─────────────┼──000132c4: 14000042 b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x132c8 0x132dc (DW_OP_fbreg 0x88) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:491
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132c8: d53da308 mrs x8, amair_el12
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:491.26 (kvm_host.h) Sbepe case AMAIR_EL1: *val = ║read_sysreg_s(SYS_AMAIR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132cc: f90047e8 str x8, [sp, #136]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132d0: f94047e8 ldr x8, [sp, #136]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132d4: f90043e8 str x8, [sp, #128]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132d8: f94043e8 ldr x8, [sp, #128]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x132c8 0x132dc (DW_OP_fbreg 0x88) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:491
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:491.20 (kvm_host.h) sbepe case AMAIR_EL1: *║val = read_sysreg_s(SYS_AMAIR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132dc: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:491.24 (kvm_host.h) sbepe case AMAIR_EL1: *val ║= read_sysreg_s(SYS_AMAIR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132e0: f9000128 str x8, [x9]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:491.57 (kvm_host.h) sbepe case AMAIR_EL1: *val = read_sysreg_s(SYS_AMAIR_EL12); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌───────────┼──000132e4: 1400003a b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x132e8 0x132fc (DW_OP_fbreg 0x78) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:492
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132e8: d53de108 mrs x8, cntkctl_el12
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:492.27 (kvm_host.h) Sbepe case CNTKCTL_EL1: *val = ║read_sysreg_s(SYS_CNTKCTL_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132ec: f9003fe8 str x8, [sp, #120]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132f0: f9403fe8 ldr x8, [sp, #120]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132f4: f9003be8 str x8, [sp, #112]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132f8: f9403be8 ldr x8, [sp, #112]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x132e8 0x132fc (DW_OP_fbreg 0x78) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:492
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:492.21 (kvm_host.h) sbepe case CNTKCTL_EL1: *║val = read_sysreg_s(SYS_CNTKCTL_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000132fc: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:492.25 (kvm_host.h) sbepe case CNTKCTL_EL1: *val ║= read_sysreg_s(SYS_CNTKCTL_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013300: f9000128 str x8, [x9]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:492.60 (kvm_host.h) sbepe case CNTKCTL_EL1: *val = read_sysreg_s(SYS_CNTKCTL_EL12); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌─────────┼──00013304: 14000032 b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13308 0x1331c (DW_OP_fbreg 0x68) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:493
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013308: d53d4028 mrs x8, elr_el12
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:493.24 (kvm_host.h) Sbepe case ELR_EL1: *val = ║read_sysreg_s(SYS_ELR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001330c: f90037e8 str x8, [sp, #104]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013310: f94037e8 ldr x8, [sp, #104]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013314: f90033e8 str x8, [sp, #96]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013318: f94033e8 ldr x8, [sp, #96]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13308 0x1331c (DW_OP_fbreg 0x68) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:493
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:493.18 (kvm_host.h) sbepe case ELR_EL1: *║val = read_sysreg_s(SYS_ELR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001331c: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:493.22 (kvm_host.h) sbepe case ELR_EL1: *val ║= read_sysreg_s(SYS_ELR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013320: f9000128 str x8, [x9]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:493.53 (kvm_host.h) sbepe case ELR_EL1: *val = read_sysreg_s(SYS_ELR_EL12); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌───────┼──00013324: 1400002a b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:494.24 (kvm_host.h) Sbepe case PAR_EL1: *val = ║read_sysreg_par(); break;
+par var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13328 0x13354 (DW_OP_fbreg 0x58) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:494
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013328: d503201f nop
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:494.24 (kvm_host.h) sbepe case PAR_EL1: *val = ║read_sysreg_par(); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1332c 0x13340 (DW_OP_fbreg 0x50) lexblock:lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:494
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001332c: d5387408 mrs x8, par_el1
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013330: f9002be8 str x8, [sp, #80]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013334: f9402be8 ldr x8, [sp, #80]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013338: f90027e8 str x8, [sp, #72]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001333c: f94027e8 ldr x8, [sp, #72]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1332c 0x13340 (DW_OP_fbreg 0x50) lexblock:lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:494
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:494.24 (kvm_host.h) sbepe case PAR_EL1: *val = ║read_sysreg_par(); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013340: f9002fe8 str x8, [sp, #88]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013344: d503201f nop
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013348: f9402fe8 ldr x8, [sp, #88]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001334c: f90023e8 str x8, [sp, #64]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013350: f94023e8 ldr x8, [sp, #64]
-par var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13328 0x13354 (DW_OP_fbreg 0x58) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:494
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:494.18 (kvm_host.h) sbepe case PAR_EL1: *║val = read_sysreg_par(); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013354: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:494.22 (kvm_host.h) sbepe case PAR_EL1: *val ║= read_sysreg_par(); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013358: f9000128 str x8, [x9]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:494.44 (kvm_host.h) sbepe case PAR_EL1: *val = read_sysreg_par(); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌─────┼──0001335c: 1400001c b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13360 0x13374 (DW_OP_fbreg 0x38) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:495
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013360: d53c3008 mrs x8, dacr32_el2
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:495.26 (kvm_host.h) Sbepe case DACR32_EL2: *val = ║read_sysreg_s(SYS_DACR32_EL2); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013364: f9001fe8 str x8, [sp, #56]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013368: f9401fe8 ldr x8, [sp, #56]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001336c: f9001be8 str x8, [sp, #48]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013370: f9401be8 ldr x8, [sp, #48]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13360 0x13374 (DW_OP_fbreg 0x38) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:495
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:495.20 (kvm_host.h) sbepe case DACR32_EL2: *║val = read_sysreg_s(SYS_DACR32_EL2); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013374: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:495.24 (kvm_host.h) sbepe case DACR32_EL2: *val ║= read_sysreg_s(SYS_DACR32_EL2); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013378: f9000128 str x8, [x9]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:495.57 (kvm_host.h) sbepe case DACR32_EL2: *val = read_sysreg_s(SYS_DACR32_EL2); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌───┼──0001337c: 14000014 b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13380 0x13394 (DW_OP_fbreg 0x28) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:496
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013380: d53c5028 mrs x8, ifsr32_el2
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:496.26 (kvm_host.h) Sbepe case IFSR32_EL2: *val = ║read_sysreg_s(SYS_IFSR32_EL2); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013384: f90017e8 str x8, [sp, #40]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013388: f94017e8 ldr x8, [sp, #40]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001338c: f90013e8 str x8, [sp, #32]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013390: f94013e8 ldr x8, [sp, #32]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13380 0x13394 (DW_OP_fbreg 0x28) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:496
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:496.20 (kvm_host.h) sbepe case IFSR32_EL2: *║val = read_sysreg_s(SYS_IFSR32_EL2); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013394: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:496.24 (kvm_host.h) sbepe case IFSR32_EL2: *val ║= read_sysreg_s(SYS_IFSR32_EL2); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013398: f9000128 str x8, [x9]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:496.57 (kvm_host.h) sbepe case IFSR32_EL2: *val = read_sysreg_s(SYS_IFSR32_EL2); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌─┼──0001339c: 1400000c b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x133a0 0x133b4 (DW_OP_fbreg 0x18) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:497
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000133a0: d5340708 mrs x8, dbgvcr32_el2
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:497.28 (kvm_host.h) Sbepe case DBGVCR32_EL2: *val = ║read_sysreg_s(SYS_DBGVCR32_EL2); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000133a4: f9000fe8 str x8, [sp, #24]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000133a8: f9400fe8 ldr x8, [sp, #24]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000133ac: f9000be8 str x8, [sp, #16]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000133b0: f9400be8 ldr x8, [sp, #16]
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x133a0 0x133b4 (DW_OP_fbreg 0x18) lexblock:__vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:497
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:497.22 (kvm_host.h) sbepe case DBGVCR32_EL2: *║val = read_sysreg_s(SYS_DBGVCR32_EL2); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000133b4: f940cbe9 ldr x9, [sp, #400]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:497.26 (kvm_host.h) sbepe case DBGVCR32_EL2: *val ║= read_sysreg_s(SYS_DBGVCR32_EL2); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000133b8: f9000128 str x8, [x9]
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:497.61 (kvm_host.h) sbepe case DBGVCR32_EL2: *val = read_sysreg_s(SYS_DBGVCR32_EL2); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─000133bc: 14000004 b 133cc <__vcpu_read_sys_reg_from_cpu+0x364>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ └┼>000133c0: 2a1f03e8 mov w8, wzr <- 000130ac(b.cc)<__vcpu_read_sys_reg_from_cpu+0x358>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_read_sys_reg_from_cpu:498.12 (kvm_host.h) Sbepe default: ║return false;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000133c4: 39067be8 strb w8, [sp, #414]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─┼─000133c8: 14000004 b 133d8 <__vcpu_read_sys_reg_from_cpu+0x370>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ │
~ │└>└>└>└>└>└>└>└>└>└>└>└>└>└>└>└>└>└>└>└>└>└┼>└>000133cc: 52800028 mov w8, #0x1 // #1 <- 000130e4(b)<__vcpu_read_sys_reg_from_cpu+0x364>,00013104(b)<__vcpu_read_sys_reg_from_cpu+0x364>,00013124(b)<__vcpu_read_sys_reg_from_cpu+0x364>,00013144(b)<__vcpu_read_sys_reg_from_cpu+0x364>,00013164(b)<__vcpu_read_sys_reg_from_cpu+0x364>,00013184(b)<__vcpu_read_sys_reg_from_cpu+0x364>,000131a4(b)<__vcpu_read_sys_reg_from_cpu+0x364>,000131c4(b)<__vcpu_read_sys_reg_from_cpu+0x364>,000131e4(b)<__vcpu_read_sys_reg_from_cpu+0x364>,00013204(b)<__vcpu_read_sys_reg_from_cpu+0x364>,00013224(b)<__vcpu_read_sys_reg_from_cpu+0x364>,00013244(b)<__vcpu_read_sys_reg_from_cpu+0x364>,00013264(b)<__vcpu_read_sys_reg_from_cpu+0x364>,00013284(b)<__vcpu_read_sys_reg_from_cpu+0x364>,000132a4(b)<__vcpu_read_sys_reg_from_cpu+0x364>,000132c4(b)<__vcpu_read_sys_reg_from_cpu+0x364>,000132e4(b)<__vcpu_read_sys_reg_from_cpu+0x364>,00013304(b)<__vcpu_read_sys_reg_from_cpu+0x364>,00013324(b)<__vcpu_read_sys_reg_from_cpu+0x364>,0001335c(b)<__vcpu_read_sys_reg_from_cpu+0x364>,0001337c(b)<__vcpu_read_sys_reg_from_cpu+0x364>,0001339c(b)<__vcpu_read_sys_reg_from_cpu+0x364>,000133bc(b)<__vcpu_read_sys_reg_from_cpu+0x364>
│ │ __vcpu_read_sys_reg_from_cpu:501.2 (kvm_host.h) Sbepe ║return true;
~ │ │ 000133d0: 39067be8 strb w8, [sp, #414]
~ │ │ ┌─000133d4: 14000001 b 133d8 <__vcpu_read_sys_reg_from_cpu+0x370>
│ │ │
│ │ │ __vcpu_read_sys_reg_from_cpu:502.1 (kvm_host.h) Sbepe ║}
~ └──────────────────────────────────────────>└>└>000133d8: 39467be0 ldrb w0, [sp, #414] <- 00013094(b)<__vcpu_read_sys_reg_from_cpu+0x370>,000133c8(b)<__vcpu_read_sys_reg_from_cpu+0x370>,000133d4(b)<__vcpu_read_sys_reg_from_cpu+0x370>
~ 000133dc: f940d3fd ldr x29, [sp, #416]
~ 000133e0: 9106c3ff add sp, sp, #0x1b0
00013070 CFA:r31+432 r29:c-16
~ 000133e4: d65f03c0 ret
-reg param int (base type, DW_ATE_signed size:4) 0x13068 0x133e8 (DW_OP_fbreg 0x198) __vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:458
-val param pointer(typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8)))) 0x13068 0x133e8 (DW_OP_fbreg 0x190) __vcpu_read_sys_reg_from_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:458
**000133e8 <__vcpu_write_sys_reg>:
+ __vcpu_write_sys_reg params:
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x133e8 0x1343c (DW_OP_fbreg -0x8)
+val param typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x133e8 0x1343c (DW_OP_breg31 0x10)
+reg param int (base type, DW_ATE_signed size:4) 0x133e8 0x1343c (DW_OP_breg31 0xc)
__vcpu_write_sys_reg:32.0 (exception.c) Sbepe ║{
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x133e8 0x1343c (DW_OP_fbreg -0x8) __vcpu_write_sys_reg:arch/arm64/kvm/hyp/nvhe/../exception.c:31
+val param typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x133e8 0x1343c (DW_OP_breg31 0x10) __vcpu_write_sys_reg:arch/arm64/kvm/hyp/nvhe/../exception.c:31
+reg param int (base type, DW_ATE_signed size:4) 0x133e8 0x1343c (DW_OP_breg31 0xc) __vcpu_write_sys_reg:arch/arm64/kvm/hyp/nvhe/../exception.c:31
~ 000133e8: d100c3ff sub sp, sp, #0x30 <- 00012b94(bl)<__vcpu_write_sys_reg>
~ 000133ec: a9027bfd stp x29, x30, [sp, #32]
000133e8 CFA:r31 r29:u r30:u
~ 000133f0: 910083fd add x29, sp, #0x20
~ 000133f4: f81f83a0 stur x0, [x29, #-8]
~ 000133f8: f9000be1 str x1, [sp, #16]
~ 000133fc: b9000fe2 str w2, [sp, #12]
__vcpu_write_sys_reg:33.34 (exception.c) SbePe if (__vcpu_write_sys_reg_to_cpu(║val, reg))
~ 00013400: f9400be0 ldr x0, [sp, #16]
__vcpu_write_sys_reg:33.39 (exception.c) sbepe if (__vcpu_write_sys_reg_to_cpu(val, ║reg))
~ 00013404: b9400fe1 ldr w1, [sp, #12]
__vcpu_write_sys_reg:33.6 (exception.c) sbepe if (║__vcpu_write_sys_reg_to_cpu(val, reg))
~ 00013408: 94000018 bl 13468 <__vcpu_write_sys_reg_to_cpu>
__vcpu_write_sys_reg:33.6 (exception.c) sbepe if (║__vcpu_write_sys_reg_to_cpu(val, reg))
~ ┌──0001340c: 36000060 tbz w0, #0, 13418 <__vcpu_write_sys_reg+0x30> <- 00013408(bl-succ)<return>
│
~ │┌─00013410: 14000001 b 13414 <__vcpu_write_sys_reg+0x2c> <- 0001340c(b.cc-succ)<fallthrough>
││
││ __vcpu_write_sys_reg:34.3 (exception.c) Sbepe ║return;
~ ┌┼└>00013414: 14000007 b 13430 <__vcpu_write_sys_reg+0x48> <- 00013410(b)<__vcpu_write_sys_reg+0x2c>
││
││ __vcpu_write_sys_reg:36.31 (exception.c) Sbepe __vcpu_sys_reg(vcpu, reg) = ║val;
~ │└─>00013418: f9400be8 ldr x8, [sp, #16] <- 0001340c(b.cc)<__vcpu_write_sys_reg+0x30>
│ __vcpu_write_sys_reg:36.3 (exception.c) sbepe ║__vcpu_sys_reg(vcpu, reg) = val;
~ │ 0001341c: f85f83a9 ldur x9, [x29, #-8]
~ │ 00013420: b9800fea ldrsw x10, [sp, #12]
~ │ 00013424: 8b0a0d29 add x9, x9, x10, lsl #3
│ __vcpu_write_sys_reg:36.29 (exception.c) sbepe __vcpu_sys_reg(vcpu, reg) ║= val;
~ │ 00013428: f9025128 str x8, [x9, #1184]
│ __vcpu_write_sys_reg:37.1 (exception.c) Sbepe ║}
~ │ ┌─0001342c: 14000001 b 13430 <__vcpu_write_sys_reg+0x48>
│ │
~ └>└>00013430: a9427bfd ldp x29, x30, [sp, #32] <- 00013414(b)<__vcpu_write_sys_reg+0x48>,0001342c(b)<__vcpu_write_sys_reg+0x48>
~ 00013434: 9100c3ff add sp, sp, #0x30
000133f4 CFA:r29+16 r29:c-16 r30:c-8
~ 00013438: d65f03c0 ret
-vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x133e8 0x1343c (DW_OP_fbreg -0x8) __vcpu_write_sys_reg:arch/arm64/kvm/hyp/nvhe/../exception.c:31
-val param typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x133e8 0x1343c (DW_OP_breg31 0x10) __vcpu_write_sys_reg:arch/arm64/kvm/hyp/nvhe/../exception.c:31
-reg param int (base type, DW_ATE_signed size:4) 0x133e8 0x1343c (DW_OP_breg31 0xc) __vcpu_write_sys_reg:arch/arm64/kvm/hyp/nvhe/../exception.c:31
**0001343c <__vcpu_write_spsr>:
+ __vcpu_write_spsr params:
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x1343c 0x13468 (DW_OP_fbreg 0x18)
+val param typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1343c 0x13468 (DW_OP_fbreg 0x10)
__vcpu_write_spsr:40.0 (exception.c) Sbepe ║{
0001343c CFA:r31
+vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x1343c 0x13468 (DW_OP_fbreg 0x18) __vcpu_write_spsr:arch/arm64/kvm/hyp/nvhe/../exception.c:39
+val param typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1343c 0x13468 (DW_OP_fbreg 0x10) __vcpu_write_spsr:arch/arm64/kvm/hyp/nvhe/../exception.c:39
~ 0001343c: d10083ff sub sp, sp, #0x20 <- 00012cf8(bl)<__vcpu_write_spsr>
~ 00013440: f9000fe0 str x0, [sp, #24]
~ 00013444: f9000be1 str x1, [sp, #16]
__vcpu_write_spsr:41.2 (exception.c) SbePe ║write_sysreg_el1(val, SYS_SPSR);
~ ┌─00013448: 14000001 b 1344c <__vcpu_write_spsr+0x10>
│
│ __vcpu_write_spsr:41.2 (exception.c) sbepe ║write_sysreg_el1(val, SYS_SPSR);
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1344c 0x13460 (DW_OP_fbreg 0x8) lexblock:__vcpu_write_spsr:arch/arm64/kvm/hyp/nvhe/../exception.c:41
~ └>0001344c: f9400be8 ldr x8, [sp, #16] <- 00013448(b)<__vcpu_write_spsr+0x10>
~ 00013450: f90007e8 str x8, [sp, #8]
~ 00013454: f94007e8 ldr x8, [sp, #8]
~ 00013458: d5184008 msr spsr_el1, x8
~ ┌─0001345c: 14000001 b 13460 <__vcpu_write_spsr+0x24>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1344c 0x13460 (DW_OP_fbreg 0x8) lexblock:__vcpu_write_spsr:arch/arm64/kvm/hyp/nvhe/../exception.c:41
│
│ __vcpu_write_spsr:42.1 (exception.c) Sbepe ║}
~ └>00013460: 910083ff add sp, sp, #0x20 <- 0001345c(b)<__vcpu_write_spsr+0x24>
00013440 CFA:r31+32
~ 00013464: d65f03c0 ret
-vcpu param pointer(struct kvm_vcpu<c7fa0>/<c8508>) 0x1343c 0x13468 (DW_OP_fbreg 0x18) __vcpu_write_spsr:arch/arm64/kvm/hyp/nvhe/../exception.c:39
-val param typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1343c 0x13468 (DW_OP_fbreg 0x10) __vcpu_write_spsr:arch/arm64/kvm/hyp/nvhe/../exception.c:39
**00013468 <__vcpu_write_sys_reg_to_cpu>:
+ __vcpu_write_sys_reg_to_cpu params:
+val param typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13468 0x1376c (DW_OP_fbreg 0xd0)
+reg param int (base type, DW_ATE_signed size:4) 0x13468 0x1376c (DW_OP_fbreg 0xcc)
__vcpu_write_sys_reg_to_cpu:505.0 (kvm_host.h) Sbepe ║{
00013468 CFA:r31
+val param typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13468 0x1376c (DW_OP_fbreg 0xd0) __vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:504
+reg param int (base type, DW_ATE_signed size:4) 0x13468 0x1376c (DW_OP_fbreg 0xcc) __vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:504
~ 00013468: d10383ff sub sp, sp, #0xe0 <- 00013408(bl)<__vcpu_write_sys_reg_to_cpu>
~ 0001346c: f9006be0 str x0, [sp, #208]
~ 00013470: b900cfe1 str w1, [sp, #204]
~ 00013474: 2a1f03e8 mov w8, wzr
o: 0x13478 0x13480 has_vhe inlined from __vcpu_write_sys_reg_to_cpu:516 (kvm_host.h) <d6e2e>:
o has_vhe:113.3 (virt.h) SbePe ║return false;
~o 00013478: 39037fe8 strb w8, [sp, #223]
o has_vhe:116.1 (virt.h) Sbepe ║}
~o 0001347c: 39437fe8 ldrb w8, [sp, #223]
__vcpu_write_sys_reg_to_cpu:516.6 (kvm_host.h) Sbepe if (║!has_vhe())
~ ┌──00013480: 370000a8 tbnz w8, #0, 13494 <__vcpu_write_sys_reg_to_cpu+0x2c>
│
~ │┌─00013484: 14000001 b 13488 <__vcpu_write_sys_reg_to_cpu+0x20> <- 00013480(b.cc-succ)<fallthrough>
││
~ │└>00013488: 2a1f03e8 mov w8, wzr <- 00013484(b)<__vcpu_write_sys_reg_to_cpu+0x20>
│ __vcpu_write_sys_reg_to_cpu:517.3 (kvm_host.h) Sbepe ║return false;
~ │ 0001348c: 39037be8 strb w8, [sp, #222]
~ ┌──────────────────────────────────────────────┼──00013490: 140000b4 b 13760 <__vcpu_write_sys_reg_to_cpu+0x2f8>
│ │
│ │ __vcpu_write_sys_reg_to_cpu:519.10 (kvm_host.h) Sbepe switch (║reg) {
~ │ └─>00013494: b940cfe8 ldr w8, [sp, #204] <- 00013480(b.cc)<__vcpu_write_sys_reg_to_cpu+0x2c>
│ __vcpu_write_sys_reg_to_cpu:519.2 (kvm_host.h) sbepe ║switch (reg) {
~ │ 00013498: 71000908 subs w8, w8, #0x2
~ │ 0001349c: 2a0803e9 mov w9, w8
~ │ 000134a0: 7101d108 subs w8, w8, #0x74
~ │ 000134a4: f90007e9 str x9, [sp, #8]
~ │ ┌──000134a8: 54001508 b.hi 13748 <__vcpu_write_sys_reg_to_cpu+0x2e0> // b.pmore
│ │
~ │ │ 000134ac: b0000028 adrp x8, 18000 <cc_map+0x74> <- 000134a8(b.cc-succ)<fallthrough>
~ │ │ 000134b0: 91060108 add x8, x8, #0x180
~ │ │ 000134b4: f94007eb ldr x11, [sp, #8]
~ │ │ 000134b8: b8ab790a ldrsw x10, [x8, x11, lsl #2]
~ │ │ 000134bc: 8b0a0109 add x9, x8, x10
│ │
~ │ │ X000134c0: d61f0120 br x9 -> 000134c0<indirect0> <- 000134c0(br)<indirect0>
│ │ __vcpu_write_sys_reg_to_cpu:520.19 (kvm_host.h) Sbepe case CSSELR_EL1: ║write_sysreg_s(val, SYS_CSSELR_EL1); break;
~ │ │┌─000134c4: 14000001 b 134c8 <__vcpu_write_sys_reg_to_cpu+0x60>
│ ││
│ ││ __vcpu_write_sys_reg_to_cpu:520.19 (kvm_host.h) sbepe case CSSELR_EL1: ║write_sysreg_s(val, SYS_CSSELR_EL1); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x134c8 0x134dc (DW_OP_fbreg 0xc0) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:520
~ │ │└>000134c8: f9406be8 ldr x8, [sp, #208] <- 000134c4(b)<__vcpu_write_sys_reg_to_cpu+0x60>
~ │ │ 000134cc: f90063e8 str x8, [sp, #192]
~ │ │ 000134d0: f94063e8 ldr x8, [sp, #192]
~ │ │ 000134d4: d51a0008 msr csselr_el1, x8
~ │ │┌─000134d8: 14000001 b 134dc <__vcpu_write_sys_reg_to_cpu+0x74>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x134c8 0x134dc (DW_OP_fbreg 0xc0) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:520
│ ││
│ ││ __vcpu_write_sys_reg_to_cpu:520.56 (kvm_host.h) sbepe case CSSELR_EL1: write_sysreg_s(val, SYS_CSSELR_EL1); ║break;
~ │┌─────────────────────────────────────────────┼└>000134dc: 1400009e b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 000134d8(b)<__vcpu_write_sys_reg_to_cpu+0x74>
││ │ __vcpu_write_sys_reg_to_cpu:521.19 (kvm_host.h) Sbepe case SCTLR_EL1: ║write_sysreg_s(val, SYS_SCTLR_EL12); break;
~ ││ │┌─000134e0: 14000001 b 134e4 <__vcpu_write_sys_reg_to_cpu+0x7c>
││ ││
││ ││ __vcpu_write_sys_reg_to_cpu:521.19 (kvm_host.h) sbepe case SCTLR_EL1: ║write_sysreg_s(val, SYS_SCTLR_EL12); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x134e4 0x134f8 (DW_OP_fbreg 0xb8) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:521
~ ││ │└>000134e4: f9406be8 ldr x8, [sp, #208] <- 000134e0(b)<__vcpu_write_sys_reg_to_cpu+0x7c>
~ ││ │ 000134e8: f9005fe8 str x8, [sp, #184]
~ ││ │ 000134ec: f9405fe8 ldr x8, [sp, #184]
~ ││ │ 000134f0: d51d1008 msr sctlr_el12, x8
~ ││ │┌─000134f4: 14000001 b 134f8 <__vcpu_write_sys_reg_to_cpu+0x90>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x134e4 0x134f8 (DW_OP_fbreg 0xb8) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:521
││ ││
││ ││ __vcpu_write_sys_reg_to_cpu:521.56 (kvm_host.h) sbepe case SCTLR_EL1: write_sysreg_s(val, SYS_SCTLR_EL12); ║break;
~ ││ ┌───────────────────────────────────────────┼└>000134f8: 14000097 b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 000134f4(b)<__vcpu_write_sys_reg_to_cpu+0x90>
││ │ │ __vcpu_write_sys_reg_to_cpu:522.19 (kvm_host.h) Sbepe case CPACR_EL1: ║write_sysreg_s(val, SYS_CPACR_EL12); break;
~ ││ │ │┌─000134fc: 14000001 b 13500 <__vcpu_write_sys_reg_to_cpu+0x98>
││ │ ││
││ │ ││ __vcpu_write_sys_reg_to_cpu:522.19 (kvm_host.h) sbepe case CPACR_EL1: ║write_sysreg_s(val, SYS_CPACR_EL12); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13500 0x13514 (DW_OP_fbreg 0xb0) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:522
~ ││ │ │└>00013500: f9406be8 ldr x8, [sp, #208] <- 000134fc(b)<__vcpu_write_sys_reg_to_cpu+0x98>
~ ││ │ │ 00013504: f9005be8 str x8, [sp, #176]
~ ││ │ │ 00013508: f9405be8 ldr x8, [sp, #176]
~ ││ │ │ 0001350c: d51d1048 msr cpacr_el12, x8
~ ││ │ │┌─00013510: 14000001 b 13514 <__vcpu_write_sys_reg_to_cpu+0xac>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13500 0x13514 (DW_OP_fbreg 0xb0) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:522
││ │ ││
││ │ ││ __vcpu_write_sys_reg_to_cpu:522.56 (kvm_host.h) sbepe case CPACR_EL1: write_sysreg_s(val, SYS_CPACR_EL12); ║break;
~ ││ │ ┌─────────────────────────────────────────┼└>00013514: 14000090 b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 00013510(b)<__vcpu_write_sys_reg_to_cpu+0xac>
││ │ │ │ __vcpu_write_sys_reg_to_cpu:523.19 (kvm_host.h) Sbepe case TTBR0_EL1: ║write_sysreg_s(val, SYS_TTBR0_EL12); break;
~ ││ │ │ │┌─00013518: 14000001 b 1351c <__vcpu_write_sys_reg_to_cpu+0xb4>
││ │ │ ││
││ │ │ ││ __vcpu_write_sys_reg_to_cpu:523.19 (kvm_host.h) sbepe case TTBR0_EL1: ║write_sysreg_s(val, SYS_TTBR0_EL12); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1351c 0x13530 (DW_OP_fbreg 0xa8) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:523
~ ││ │ │ │└>0001351c: f9406be8 ldr x8, [sp, #208] <- 00013518(b)<__vcpu_write_sys_reg_to_cpu+0xb4>
~ ││ │ │ │ 00013520: f90057e8 str x8, [sp, #168]
~ ││ │ │ │ 00013524: f94057e8 ldr x8, [sp, #168]
~ ││ │ │ │ 00013528: d51d2008 msr ttbr0_el12, x8
~ ││ │ │ │┌─0001352c: 14000001 b 13530 <__vcpu_write_sys_reg_to_cpu+0xc8>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1351c 0x13530 (DW_OP_fbreg 0xa8) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:523
││ │ │ ││
││ │ │ ││ __vcpu_write_sys_reg_to_cpu:523.56 (kvm_host.h) sbepe case TTBR0_EL1: write_sysreg_s(val, SYS_TTBR0_EL12); ║break;
~ ││ │ │ ┌───────────────────────────────────────┼└>00013530: 14000089 b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 0001352c(b)<__vcpu_write_sys_reg_to_cpu+0xc8>
││ │ │ │ │ __vcpu_write_sys_reg_to_cpu:524.19 (kvm_host.h) Sbepe case TTBR1_EL1: ║write_sysreg_s(val, SYS_TTBR1_EL12); break;
~ ││ │ │ │ │┌─00013534: 14000001 b 13538 <__vcpu_write_sys_reg_to_cpu+0xd0>
││ │ │ │ ││
││ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:524.19 (kvm_host.h) sbepe case TTBR1_EL1: ║write_sysreg_s(val, SYS_TTBR1_EL12); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13538 0x1354c (DW_OP_fbreg 0xa0) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:524
~ ││ │ │ │ │└>00013538: f9406be8 ldr x8, [sp, #208] <- 00013534(b)<__vcpu_write_sys_reg_to_cpu+0xd0>
~ ││ │ │ │ │ 0001353c: f90053e8 str x8, [sp, #160]
~ ││ │ │ │ │ 00013540: f94053e8 ldr x8, [sp, #160]
~ ││ │ │ │ │ 00013544: d51d2028 msr ttbr1_el12, x8
~ ││ │ │ │ │┌─00013548: 14000001 b 1354c <__vcpu_write_sys_reg_to_cpu+0xe4>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13538 0x1354c (DW_OP_fbreg 0xa0) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:524
││ │ │ │ ││
││ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:524.56 (kvm_host.h) sbepe case TTBR1_EL1: write_sysreg_s(val, SYS_TTBR1_EL12); ║break;
~ ││ │ │ │ ┌─────────────────────────────────────┼└>0001354c: 14000082 b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 00013548(b)<__vcpu_write_sys_reg_to_cpu+0xe4>
││ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:525.17 (kvm_host.h) Sbepe case TCR_EL1: ║write_sysreg_s(val, SYS_TCR_EL12); break;
~ ││ │ │ │ │ │┌─00013550: 14000001 b 13554 <__vcpu_write_sys_reg_to_cpu+0xec>
││ │ │ │ │ ││
││ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:525.17 (kvm_host.h) sbepe case TCR_EL1: ║write_sysreg_s(val, SYS_TCR_EL12); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13554 0x13568 (DW_OP_fbreg 0x98) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:525
~ ││ │ │ │ │ │└>00013554: f9406be8 ldr x8, [sp, #208] <- 00013550(b)<__vcpu_write_sys_reg_to_cpu+0xec>
~ ││ │ │ │ │ │ 00013558: f9004fe8 str x8, [sp, #152]
~ ││ │ │ │ │ │ 0001355c: f9404fe8 ldr x8, [sp, #152]
~ ││ │ │ │ │ │ 00013560: d51d2048 msr tcr_el12, x8
~ ││ │ │ │ │ │┌─00013564: 14000001 b 13568 <__vcpu_write_sys_reg_to_cpu+0x100>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13554 0x13568 (DW_OP_fbreg 0x98) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:525
││ │ │ │ │ ││
││ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:525.52 (kvm_host.h) sbepe case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); ║break;
~ ││ │ │ │ │ ┌───────────────────────────────────┼└>00013568: 1400007b b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 00013564(b)<__vcpu_write_sys_reg_to_cpu+0x100>
││ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:526.17 (kvm_host.h) Sbepe case ESR_EL1: ║write_sysreg_s(val, SYS_ESR_EL12); break;
~ ││ │ │ │ │ │ │┌─0001356c: 14000001 b 13570 <__vcpu_write_sys_reg_to_cpu+0x108>
││ │ │ │ │ │ ││
││ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:526.17 (kvm_host.h) sbepe case ESR_EL1: ║write_sysreg_s(val, SYS_ESR_EL12); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13570 0x13584 (DW_OP_fbreg 0x90) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:526
~ ││ │ │ │ │ │ │└>00013570: f9406be8 ldr x8, [sp, #208] <- 0001356c(b)<__vcpu_write_sys_reg_to_cpu+0x108>
~ ││ │ │ │ │ │ │ 00013574: f9004be8 str x8, [sp, #144]
~ ││ │ │ │ │ │ │ 00013578: f9404be8 ldr x8, [sp, #144]
~ ││ │ │ │ │ │ │ 0001357c: d51d5208 msr esr_el12, x8
~ ││ │ │ │ │ │ │┌─00013580: 14000001 b 13584 <__vcpu_write_sys_reg_to_cpu+0x11c>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13570 0x13584 (DW_OP_fbreg 0x90) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:526
││ │ │ │ │ │ ││
││ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:526.52 (kvm_host.h) sbepe case ESR_EL1: write_sysreg_s(val, SYS_ESR_EL12); ║break;
~ ││ │ │ │ │ │ ┌─────────────────────────────────┼└>00013584: 14000074 b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 00013580(b)<__vcpu_write_sys_reg_to_cpu+0x11c>
││ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:527.19 (kvm_host.h) Sbepe case AFSR0_EL1: ║write_sysreg_s(val, SYS_AFSR0_EL12); break;
~ ││ │ │ │ │ │ │ │┌─00013588: 14000001 b 1358c <__vcpu_write_sys_reg_to_cpu+0x124>
││ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:527.19 (kvm_host.h) sbepe case AFSR0_EL1: ║write_sysreg_s(val, SYS_AFSR0_EL12); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1358c 0x135a0 (DW_OP_fbreg 0x88) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:527
~ ││ │ │ │ │ │ │ │└>0001358c: f9406be8 ldr x8, [sp, #208] <- 00013588(b)<__vcpu_write_sys_reg_to_cpu+0x124>
~ ││ │ │ │ │ │ │ │ 00013590: f90047e8 str x8, [sp, #136]
~ ││ │ │ │ │ │ │ │ 00013594: f94047e8 ldr x8, [sp, #136]
~ ││ │ │ │ │ │ │ │ 00013598: d51d5108 msr afsr0_el12, x8
~ ││ │ │ │ │ │ │ │┌─0001359c: 14000001 b 135a0 <__vcpu_write_sys_reg_to_cpu+0x138>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1358c 0x135a0 (DW_OP_fbreg 0x88) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:527
││ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:527.56 (kvm_host.h) sbepe case AFSR0_EL1: write_sysreg_s(val, SYS_AFSR0_EL12); ║break;
~ ││ │ │ │ │ │ │ ┌───────────────────────────────┼└>000135a0: 1400006d b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 0001359c(b)<__vcpu_write_sys_reg_to_cpu+0x138>
││ │ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:528.19 (kvm_host.h) Sbepe case AFSR1_EL1: ║write_sysreg_s(val, SYS_AFSR1_EL12); break;
~ ││ │ │ │ │ │ │ │ │┌─000135a4: 14000001 b 135a8 <__vcpu_write_sys_reg_to_cpu+0x140>
││ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:528.19 (kvm_host.h) sbepe case AFSR1_EL1: ║write_sysreg_s(val, SYS_AFSR1_EL12); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x135a8 0x135bc (DW_OP_fbreg 0x80) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:528
~ ││ │ │ │ │ │ │ │ │└>000135a8: f9406be8 ldr x8, [sp, #208] <- 000135a4(b)<__vcpu_write_sys_reg_to_cpu+0x140>
~ ││ │ │ │ │ │ │ │ │ 000135ac: f90043e8 str x8, [sp, #128]
~ ││ │ │ │ │ │ │ │ │ 000135b0: f94043e8 ldr x8, [sp, #128]
~ ││ │ │ │ │ │ │ │ │ 000135b4: d51d5128 msr afsr1_el12, x8
~ ││ │ │ │ │ │ │ │ │┌─000135b8: 14000001 b 135bc <__vcpu_write_sys_reg_to_cpu+0x154>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x135a8 0x135bc (DW_OP_fbreg 0x80) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:528
││ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:528.56 (kvm_host.h) sbepe case AFSR1_EL1: write_sysreg_s(val, SYS_AFSR1_EL12); ║break;
~ ││ │ │ │ │ │ │ │ ┌─────────────────────────────┼└>000135bc: 14000066 b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 000135b8(b)<__vcpu_write_sys_reg_to_cpu+0x154>
││ │ │ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:529.17 (kvm_host.h) Sbepe case FAR_EL1: ║write_sysreg_s(val, SYS_FAR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │┌─000135c0: 14000001 b 135c4 <__vcpu_write_sys_reg_to_cpu+0x15c>
││ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:529.17 (kvm_host.h) sbepe case FAR_EL1: ║write_sysreg_s(val, SYS_FAR_EL12); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x135c4 0x135d8 (DW_OP_fbreg 0x78) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:529
~ ││ │ │ │ │ │ │ │ │ │└>000135c4: f9406be8 ldr x8, [sp, #208] <- 000135c0(b)<__vcpu_write_sys_reg_to_cpu+0x15c>
~ ││ │ │ │ │ │ │ │ │ │ 000135c8: f9003fe8 str x8, [sp, #120]
~ ││ │ │ │ │ │ │ │ │ │ 000135cc: f9403fe8 ldr x8, [sp, #120]
~ ││ │ │ │ │ │ │ │ │ │ 000135d0: d51d6008 msr far_el12, x8
~ ││ │ │ │ │ │ │ │ │ │┌─000135d4: 14000001 b 135d8 <__vcpu_write_sys_reg_to_cpu+0x170>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x135c4 0x135d8 (DW_OP_fbreg 0x78) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:529
││ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:529.52 (kvm_host.h) sbepe case FAR_EL1: write_sysreg_s(val, SYS_FAR_EL12); ║break;
~ ││ │ │ │ │ │ │ │ │ ┌───────────────────────────┼└>000135d8: 1400005f b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 000135d4(b)<__vcpu_write_sys_reg_to_cpu+0x170>
││ │ │ │ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:530.18 (kvm_host.h) Sbepe case MAIR_EL1: ║write_sysreg_s(val, SYS_MAIR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │┌─000135dc: 14000001 b 135e0 <__vcpu_write_sys_reg_to_cpu+0x178>
││ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:530.18 (kvm_host.h) sbepe case MAIR_EL1: ║write_sysreg_s(val, SYS_MAIR_EL12); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x135e0 0x135f4 (DW_OP_fbreg 0x70) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:530
~ ││ │ │ │ │ │ │ │ │ │ │└>000135e0: f9406be8 ldr x8, [sp, #208] <- 000135dc(b)<__vcpu_write_sys_reg_to_cpu+0x178>
~ ││ │ │ │ │ │ │ │ │ │ │ 000135e4: f9003be8 str x8, [sp, #112]
~ ││ │ │ │ │ │ │ │ │ │ │ 000135e8: f9403be8 ldr x8, [sp, #112]
~ ││ │ │ │ │ │ │ │ │ │ │ 000135ec: d51da208 msr mair_el12, x8
~ ││ │ │ │ │ │ │ │ │ │ │┌─000135f0: 14000001 b 135f4 <__vcpu_write_sys_reg_to_cpu+0x18c>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x135e0 0x135f4 (DW_OP_fbreg 0x70) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:530
││ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:530.54 (kvm_host.h) sbepe case MAIR_EL1: write_sysreg_s(val, SYS_MAIR_EL12); ║break;
~ ││ │ │ │ │ │ │ │ │ │ ┌─────────────────────────┼└>000135f4: 14000058 b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 000135f0(b)<__vcpu_write_sys_reg_to_cpu+0x18c>
││ │ │ │ │ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:531.18 (kvm_host.h) Sbepe case VBAR_EL1: ║write_sysreg_s(val, SYS_VBAR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │┌─000135f8: 14000001 b 135fc <__vcpu_write_sys_reg_to_cpu+0x194>
││ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:531.18 (kvm_host.h) sbepe case VBAR_EL1: ║write_sysreg_s(val, SYS_VBAR_EL12); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x135fc 0x13610 (DW_OP_fbreg 0x68) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:531
~ ││ │ │ │ │ │ │ │ │ │ │ │└>000135fc: f9406be8 ldr x8, [sp, #208] <- 000135f8(b)<__vcpu_write_sys_reg_to_cpu+0x194>
~ ││ │ │ │ │ │ │ │ │ │ │ │ 00013600: f90037e8 str x8, [sp, #104]
~ ││ │ │ │ │ │ │ │ │ │ │ │ 00013604: f94037e8 ldr x8, [sp, #104]
~ ││ │ │ │ │ │ │ │ │ │ │ │ 00013608: d51dc008 msr vbar_el12, x8
~ ││ │ │ │ │ │ │ │ │ │ │ │┌─0001360c: 14000001 b 13610 <__vcpu_write_sys_reg_to_cpu+0x1a8>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x135fc 0x13610 (DW_OP_fbreg 0x68) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:531
││ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:531.54 (kvm_host.h) sbepe case VBAR_EL1: write_sysreg_s(val, SYS_VBAR_EL12); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ ┌───────────────────────┼└>00013610: 14000051 b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 0001360c(b)<__vcpu_write_sys_reg_to_cpu+0x1a8>
││ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:532.23 (kvm_host.h) Sbepe case CONTEXTIDR_EL1: ║write_sysreg_s(val, SYS_CONTEXTIDR_EL12);break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │┌─00013614: 14000001 b 13618 <__vcpu_write_sys_reg_to_cpu+0x1b0>
││ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:532.23 (kvm_host.h) sbepe case CONTEXTIDR_EL1: ║write_sysreg_s(val, SYS_CONTEXTIDR_EL12);break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13618 0x1362c (DW_OP_fbreg 0x60) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:532
~ ││ │ │ │ │ │ │ │ │ │ │ │ │└>00013618: f9406be8 ldr x8, [sp, #208] <- 00013614(b)<__vcpu_write_sys_reg_to_cpu+0x1b0>
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ 0001361c: f90033e8 str x8, [sp, #96]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ 00013620: f94033e8 ldr x8, [sp, #96]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ 00013624: d51dd028 msr contextidr_el12, x8
~ ││ │ │ │ │ │ │ │ │ │ │ │ │┌─00013628: 14000001 b 1362c <__vcpu_write_sys_reg_to_cpu+0x1c4>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13618 0x1362c (DW_OP_fbreg 0x60) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:532
││ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:532.64 (kvm_host.h) sbepe case CONTEXTIDR_EL1: write_sysreg_s(val, SYS_CONTEXTIDR_EL12);║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ ┌─────────────────────┼└>0001362c: 1400004a b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 00013628(b)<__vcpu_write_sys_reg_to_cpu+0x1c4>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:533.19 (kvm_host.h) Sbepe case TPIDR_EL0: ║write_sysreg_s(val, SYS_TPIDR_EL0); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │┌─00013630: 14000001 b 13634 <__vcpu_write_sys_reg_to_cpu+0x1cc>
││ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:533.19 (kvm_host.h) sbepe case TPIDR_EL0: ║write_sysreg_s(val, SYS_TPIDR_EL0); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13634 0x13648 (DW_OP_fbreg 0x58) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:533
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │└>00013634: f9406be8 ldr x8, [sp, #208] <- 00013630(b)<__vcpu_write_sys_reg_to_cpu+0x1cc>
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013638: f9002fe8 str x8, [sp, #88]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001363c: f9402fe8 ldr x8, [sp, #88]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013640: d51bd048 msr tpidr_el0, x8
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │┌─00013644: 14000001 b 13648 <__vcpu_write_sys_reg_to_cpu+0x1e0>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13634 0x13648 (DW_OP_fbreg 0x58) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:533
││ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:533.55 (kvm_host.h) sbepe case TPIDR_EL0: write_sysreg_s(val, SYS_TPIDR_EL0); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ ┌───────────────────┼└>00013648: 14000043 b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 00013644(b)<__vcpu_write_sys_reg_to_cpu+0x1e0>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:534.20 (kvm_host.h) Sbepe case TPIDRRO_EL0: ║write_sysreg_s(val, SYS_TPIDRRO_EL0); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─0001364c: 14000001 b 13650 <__vcpu_write_sys_reg_to_cpu+0x1e8>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:534.20 (kvm_host.h) sbepe case TPIDRRO_EL0: ║write_sysreg_s(val, SYS_TPIDRRO_EL0); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13650 0x13664 (DW_OP_fbreg 0x50) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:534
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │└>00013650: f9406be8 ldr x8, [sp, #208] <- 0001364c(b)<__vcpu_write_sys_reg_to_cpu+0x1e8>
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013654: f9002be8 str x8, [sp, #80]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013658: f9402be8 ldr x8, [sp, #80]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001365c: d51bd068 msr tpidrro_el0, x8
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─00013660: 14000001 b 13664 <__vcpu_write_sys_reg_to_cpu+0x1fc>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13650 0x13664 (DW_OP_fbreg 0x50) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:534
││ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:534.58 (kvm_host.h) sbepe case TPIDRRO_EL0: write_sysreg_s(val, SYS_TPIDRRO_EL0); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌─────────────────┼└>00013664: 1400003c b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 00013660(b)<__vcpu_write_sys_reg_to_cpu+0x1fc>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:535.19 (kvm_host.h) Sbepe case TPIDR_EL1: ║write_sysreg_s(val, SYS_TPIDR_EL1); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─00013668: 14000001 b 1366c <__vcpu_write_sys_reg_to_cpu+0x204>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:535.19 (kvm_host.h) sbepe case TPIDR_EL1: ║write_sysreg_s(val, SYS_TPIDR_EL1); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1366c 0x13680 (DW_OP_fbreg 0x48) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:535
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │└>0001366c: f9406be8 ldr x8, [sp, #208] <- 00013668(b)<__vcpu_write_sys_reg_to_cpu+0x204>
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013670: f90027e8 str x8, [sp, #72]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013674: f94027e8 ldr x8, [sp, #72]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013678: d518d088 msr tpidr_el1, x8
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─0001367c: 14000001 b 13680 <__vcpu_write_sys_reg_to_cpu+0x218>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x1366c 0x13680 (DW_OP_fbreg 0x48) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:535
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:535.55 (kvm_host.h) sbepe case TPIDR_EL1: write_sysreg_s(val, SYS_TPIDR_EL1); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌───────────────┼└>00013680: 14000035 b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 0001367c(b)<__vcpu_write_sys_reg_to_cpu+0x218>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:536.19 (kvm_host.h) Sbepe case AMAIR_EL1: ║write_sysreg_s(val, SYS_AMAIR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─00013684: 14000001 b 13688 <__vcpu_write_sys_reg_to_cpu+0x220>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:536.19 (kvm_host.h) sbepe case AMAIR_EL1: ║write_sysreg_s(val, SYS_AMAIR_EL12); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13688 0x1369c (DW_OP_fbreg 0x40) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:536
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │└>00013688: f9406be8 ldr x8, [sp, #208] <- 00013684(b)<__vcpu_write_sys_reg_to_cpu+0x220>
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001368c: f90023e8 str x8, [sp, #64]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013690: f94023e8 ldr x8, [sp, #64]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013694: d51da308 msr amair_el12, x8
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─00013698: 14000001 b 1369c <__vcpu_write_sys_reg_to_cpu+0x234>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13688 0x1369c (DW_OP_fbreg 0x40) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:536
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:536.56 (kvm_host.h) sbepe case AMAIR_EL1: write_sysreg_s(val, SYS_AMAIR_EL12); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌─────────────┼└>0001369c: 1400002e b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 00013698(b)<__vcpu_write_sys_reg_to_cpu+0x234>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:537.20 (kvm_host.h) Sbepe case CNTKCTL_EL1: ║write_sysreg_s(val, SYS_CNTKCTL_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─000136a0: 14000001 b 136a4 <__vcpu_write_sys_reg_to_cpu+0x23c>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:537.20 (kvm_host.h) sbepe case CNTKCTL_EL1: ║write_sysreg_s(val, SYS_CNTKCTL_EL12); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x136a4 0x136b8 (DW_OP_fbreg 0x38) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:537
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │└>000136a4: f9406be8 ldr x8, [sp, #208] <- 000136a0(b)<__vcpu_write_sys_reg_to_cpu+0x23c>
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000136a8: f9001fe8 str x8, [sp, #56]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000136ac: f9401fe8 ldr x8, [sp, #56]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000136b0: d51de108 msr cntkctl_el12, x8
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─000136b4: 14000001 b 136b8 <__vcpu_write_sys_reg_to_cpu+0x250>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x136a4 0x136b8 (DW_OP_fbreg 0x38) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:537
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:537.59 (kvm_host.h) sbepe case CNTKCTL_EL1: write_sysreg_s(val, SYS_CNTKCTL_EL12); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌───────────┼└>000136b8: 14000027 b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 000136b4(b)<__vcpu_write_sys_reg_to_cpu+0x250>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:538.17 (kvm_host.h) Sbepe case ELR_EL1: ║write_sysreg_s(val, SYS_ELR_EL12); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─000136bc: 14000001 b 136c0 <__vcpu_write_sys_reg_to_cpu+0x258>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:538.17 (kvm_host.h) sbepe case ELR_EL1: ║write_sysreg_s(val, SYS_ELR_EL12); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x136c0 0x136d4 (DW_OP_fbreg 0x30) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:538
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │└>000136c0: f9406be8 ldr x8, [sp, #208] <- 000136bc(b)<__vcpu_write_sys_reg_to_cpu+0x258>
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000136c4: f9001be8 str x8, [sp, #48]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000136c8: f9401be8 ldr x8, [sp, #48]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000136cc: d51d4028 msr elr_el12, x8
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─000136d0: 14000001 b 136d4 <__vcpu_write_sys_reg_to_cpu+0x26c>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x136c0 0x136d4 (DW_OP_fbreg 0x30) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:538
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:538.52 (kvm_host.h) sbepe case ELR_EL1: write_sysreg_s(val, SYS_ELR_EL12); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌─────────┼└>000136d4: 14000020 b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 000136d0(b)<__vcpu_write_sys_reg_to_cpu+0x26c>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:539.17 (kvm_host.h) Sbepe case PAR_EL1: ║write_sysreg_s(val, SYS_PAR_EL1); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─000136d8: 14000001 b 136dc <__vcpu_write_sys_reg_to_cpu+0x274>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:539.17 (kvm_host.h) sbepe case PAR_EL1: ║write_sysreg_s(val, SYS_PAR_EL1); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x136dc 0x136f0 (DW_OP_fbreg 0x28) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:539
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │└>000136dc: f9406be8 ldr x8, [sp, #208] <- 000136d8(b)<__vcpu_write_sys_reg_to_cpu+0x274>
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000136e0: f90017e8 str x8, [sp, #40]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000136e4: f94017e8 ldr x8, [sp, #40]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000136e8: d5187408 msr par_el1, x8
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─000136ec: 14000001 b 136f0 <__vcpu_write_sys_reg_to_cpu+0x288>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x136dc 0x136f0 (DW_OP_fbreg 0x28) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:539
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:539.51 (kvm_host.h) sbepe case PAR_EL1: write_sysreg_s(val, SYS_PAR_EL1); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌───────┼└>000136f0: 14000019 b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 000136ec(b)<__vcpu_write_sys_reg_to_cpu+0x288>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:540.19 (kvm_host.h) Sbepe case DACR32_EL2: ║write_sysreg_s(val, SYS_DACR32_EL2); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─000136f4: 14000001 b 136f8 <__vcpu_write_sys_reg_to_cpu+0x290>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:540.19 (kvm_host.h) sbepe case DACR32_EL2: ║write_sysreg_s(val, SYS_DACR32_EL2); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x136f8 0x1370c (DW_OP_fbreg 0x20) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:540
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │└>000136f8: f9406be8 ldr x8, [sp, #208] <- 000136f4(b)<__vcpu_write_sys_reg_to_cpu+0x290>
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 000136fc: f90013e8 str x8, [sp, #32]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013700: f94013e8 ldr x8, [sp, #32]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013704: d51c3008 msr dacr32_el2, x8
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─00013708: 14000001 b 1370c <__vcpu_write_sys_reg_to_cpu+0x2a4>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x136f8 0x1370c (DW_OP_fbreg 0x20) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:540
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:540.56 (kvm_host.h) sbepe case DACR32_EL2: write_sysreg_s(val, SYS_DACR32_EL2); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌─────┼└>0001370c: 14000012 b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 00013708(b)<__vcpu_write_sys_reg_to_cpu+0x2a4>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:541.19 (kvm_host.h) Sbepe case IFSR32_EL2: ║write_sysreg_s(val, SYS_IFSR32_EL2); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─00013710: 14000001 b 13714 <__vcpu_write_sys_reg_to_cpu+0x2ac>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:541.19 (kvm_host.h) sbepe case IFSR32_EL2: ║write_sysreg_s(val, SYS_IFSR32_EL2); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13714 0x13728 (DW_OP_fbreg 0x18) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:541
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │└>00013714: f9406be8 ldr x8, [sp, #208] <- 00013710(b)<__vcpu_write_sys_reg_to_cpu+0x2ac>
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013718: f9000fe8 str x8, [sp, #24]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001371c: f9400fe8 ldr x8, [sp, #24]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013720: d51c5028 msr ifsr32_el2, x8
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─00013724: 14000001 b 13728 <__vcpu_write_sys_reg_to_cpu+0x2c0>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13714 0x13728 (DW_OP_fbreg 0x18) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:541
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:541.56 (kvm_host.h) sbepe case IFSR32_EL2: write_sysreg_s(val, SYS_IFSR32_EL2); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌───┼└>00013728: 1400000b b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 00013724(b)<__vcpu_write_sys_reg_to_cpu+0x2c0>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:542.21 (kvm_host.h) Sbepe case DBGVCR32_EL2: ║write_sysreg_s(val, SYS_DBGVCR32_EL2); break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─0001372c: 14000001 b 13730 <__vcpu_write_sys_reg_to_cpu+0x2c8>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:542.21 (kvm_host.h) sbepe case DBGVCR32_EL2: ║write_sysreg_s(val, SYS_DBGVCR32_EL2); break;
+__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13730 0x13744 (DW_OP_fbreg 0x10) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:542
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │└>00013730: f9406be8 ldr x8, [sp, #208] <- 0001372c(b)<__vcpu_write_sys_reg_to_cpu+0x2c8>
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013734: f9000be8 str x8, [sp, #16]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 00013738: f9400be8 ldr x8, [sp, #16]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001373c: d5140708 msr dbgvcr32_el2, x8
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │┌─00013740: 14000001 b 13744 <__vcpu_write_sys_reg_to_cpu+0x2dc>
-__val var typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13730 0x13744 (DW_OP_fbreg 0x10) lexblock:__vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:542
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││ __vcpu_write_sys_reg_to_cpu:542.60 (kvm_host.h) sbepe case DBGVCR32_EL2: write_sysreg_s(val, SYS_DBGVCR32_EL2); ║break;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌┼└>00013744: 14000004 b 13754 <__vcpu_write_sys_reg_to_cpu+0x2ec> <- 00013740(b)<__vcpu_write_sys_reg_to_cpu+0x2dc>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │└─>00013748: 2a1f03e8 mov w8, wzr <- 000134a8(b.cc)<__vcpu_write_sys_reg_to_cpu+0x2e0>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ __vcpu_write_sys_reg_to_cpu:543.12 (kvm_host.h) Sbepe default: ║return false;
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 0001374c: 39037be8 strb w8, [sp, #222]
~ ││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌┼───00013750: 14000004 b 13760 <__vcpu_write_sys_reg_to_cpu+0x2f8>
││ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ││
~ │└>└>└>└>└>└>└>└>└>└>└>└>└>└>└>└>└>└>└>└>└>└>│└──>00013754: 52800028 mov w8, #0x1 // #1 <- 000134dc(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,000134f8(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,00013514(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,00013530(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,0001354c(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,00013568(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,00013584(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,000135a0(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,000135bc(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,000135d8(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,000135f4(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,00013610(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,0001362c(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,00013648(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,00013664(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,00013680(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,0001369c(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,000136b8(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,000136d4(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,000136f0(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,0001370c(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,00013728(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>,00013744(b)<__vcpu_write_sys_reg_to_cpu+0x2ec>
│ │ __vcpu_write_sys_reg_to_cpu:546.2 (kvm_host.h) Sbepe ║return true;
~ │ │ 00013758: 39037be8 strb w8, [sp, #222]
~ │ │ ┌─0001375c: 14000001 b 13760 <__vcpu_write_sys_reg_to_cpu+0x2f8>
│ │ │
│ │ │ __vcpu_write_sys_reg_to_cpu:547.1 (kvm_host.h) Sbepe ║}
~ └───────────────────────────────────────────>└─>└>00013760: 39437be0 ldrb w0, [sp, #222] <- 00013490(b)<__vcpu_write_sys_reg_to_cpu+0x2f8>,00013750(b)<__vcpu_write_sys_reg_to_cpu+0x2f8>,0001375c(b)<__vcpu_write_sys_reg_to_cpu+0x2f8>
~ 00013764: 910383ff add sp, sp, #0xe0
~ 00013768: d65f03c0 ret
-val param typedef(u64=typedef(__u64=long long unsigned int (base type, DW_ATE_unsigned size:8))) 0x13468 0x1376c (DW_OP_fbreg 0xd0) __vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:504
-reg param int (base type, DW_ATE_signed size:4) 0x13468 0x1376c (DW_OP_fbreg 0xcc) __vcpu_write_sys_reg_to_cpu:arch/arm64/kvm/hyp/nvhe/../exception.c:504
~ 0001376c: d5033fbf dmb sy
~ 00013770: d5033fbf dmb sy
0001346c CFA:r31+224
~ 00013774: d51d4008 msr spsr_el12, x8