WRC.TRTf.inv+dsb+dsb-isb

Description

In this WRC-shaped test, Thread 0 writes a new mapping before Thread 1 translates using that entry. Thread 1 then messages Thread 2, which then tries to translate the same location that Thread 1 did. If Thread 2 were allowed to see a translation fault, then this would be a kind of non-multi-copy atomic behaviour.Multi-copy atomicity would forbid this, requiring that translation-table walks are multi-copy atomic reads of flat memory.

Source

[download toml source]
Page table setup Code
physical pa1 pa2; x |-> invalid; x ?-> pa1; z |-> pa1; *pa1 = 1; y |-> pa2; identity 0x1000 with code; identity 0x2000 with code;
Thread 0
{R0=desc3(z, page_table_base), R1=pte3(x, page_table_base), PSTATE.EL=0b00, PSTATE.SP=0b0}
STR X0,[X1]
Thread 1
{R1=x, R2=extz(0b1, 64), R3=y, VBAR_EL1=extz(0x1000, 64), PSTATE.EL=0b00, PSTATE.SP=0b0}
LDR X0,[X1] DSB SY STR X2,[X3]
Thread 2
{R1=y, R3=x, VBAR_EL1=extz(0x2000, 64), PSTATE.SP=0b0, PSTATE.EL=0b00}
LDR X0,[X1] DSB SY ISB LDR X2,[X3]
thread1_el1_handler
MOV X0,#0 MRS X13,ELR_EL1 ADD X13,X13,#4 MSR ELR_EL1,X13 ERET
thread2_el1_handler
MOV X2,#0 MRS X13,ELR_EL1 ADD X13,X13,#4 MSR ELR_EL1,X13 ERET
Final State
1:X0=1 & 2:X0=1 & 2:X2=0

Execution Diagrams

Results

ETS WRC.TRTf.inv+dsb+dsb-isb forbidden (0 of 4) 16960ms
strong WRC.TRTf.inv+dsb+dsb-isb forbidden (0 of 4) 9146ms

Command-line invocation

isla-axiomatic --arch=/path/to/rems-project/isla-snapshots/aarch64.ir --config=/path/to/rems-project/isla/configs/aarch64_mmu_on.toml --footprint-config=/path/to/rems-project/isla/configs/aarch64.toml --model=/path/to/rems-project/systems-isla-tests/models/aarch64_mmu_strong_ETS.cat --armv8-page-tables --check-sat-using "(then dt2bv qe simplify solve-eqs bv)" --remove-uninteresting safe --dot . -t /path/to/litmus-tests/litmus-tests-armv8a-system-vmsa/tests/pgtable/HAND/WRC.TRTf.inv+dsb+dsb-isb.litmus.toml

To generate diagrams we use model aarch64_mmu_no_axioms.cat to get diagrams of forbidden executions. To generate LaTeX sources of each test, pass --latex=.