CoTfT+dsb-isb

Description

This test is in contrast to the previous test, where the VA used by the loads in Thread 1 are instead valid from the start, and Thread 0 attempts to ‘break’ the entry by writing an invalid descriptor (e.g. 0) to the entry. In contrast to the previous test, this one does not obey the translation↔translation coherence principle.

Source

[download toml source]
Page table setup Code
physical pa1; x |-> pa1; x ?-> invalid; y |-> pa1; *pa1 = 0; identity 0x1000 with code;
Thread 0
{R0=extz(0b0, 64), R1=pte3(x, page_table_base)}
STR X0,[X1]
Thread 1
{R1=x, R3=x, VBAR_EL1=extz(0x1000, 64), PSTATE.SP=0b0, PSTATE.EL=0b00}
LDR X2,[X1] MOV X0,X2 DSB SY ISB LDR X2,[X3]
thread1_el1_handler
MOV X2,#1 MRS X13,ELR_EL1 ADD X13,X13,#4 MSR ELR_EL1,X13 ERET
Final State
1:X0 = 1 & 1:X2=0

Execution Diagrams

Results

ETS CoTfT+dsb-isb allowed (1 of 4) 95644ms
strong CoTfT+dsb-isb allowed (1 of 4) 78905ms

Command-line invocation

isla-axiomatic --arch=/path/to/rems-project/isla-snapshots/aarch64.ir --config=/path/to/rems-project/isla/configs/aarch64_mmu_on.toml --footprint-config=/path/to/rems-project/isla/configs/aarch64.toml --model=/path/to/rems-project/systems-isla-tests/models/aarch64_mmu_strong_ETS.cat --armv8-page-tables --check-sat-using "(then dt2bv qe simplify solve-eqs bv)" --remove-uninteresting safe --dot . -t /path/to/litmus-tests/litmus-tests-armv8a-system-vmsa/tests/pgtable/HAND/CoTfT+dsb-isb.litmus.toml

To generate diagrams we use model aarch64_mmu_no_axioms.cat to get diagrams of forbidden executions. To generate LaTeX sources of each test, pass --latex=.