NEURALEQ: NEURAL-NETWORK-BASED EQUALIZER FOR HIGH-SPEED WIRELINE COMMUNICATION

Abstract

Massive data processing is required by various applications such as ML, video streaming, cloud services, etc. In such systems, I/O bandwidth must be scaled up to prevent any performance degradation due to the limited data transfer rates. To meet this demand, wireline communication recently started adopting PAM4 signaling and DSP-based equalizers. However, multi-level signaling and conventional equalizing techniques degrade the bit-error-rate (BER) performance significantly. To mitigate this problem, this paper proposes a novel neural network architecture that mimics the forward-backward algorithm estimating the posterior probabilities in Hidden Markov Models. The proposed neural network overcomes the existing equalizer performance, such as feed-forward equalizers or decisionfeedback equalizers, while reducing the complexity of the forward-backward algorithm.

1. INTRODUCTION

Recent advances in ML/AI technologies have benefited our daily life by enabling services like searching, recommendation, and translation. The rapid growth of ML applications, increasing the amount of data and computation, has driven enormous demands on high-performance computing systems. Accordingly, the I/O bandwidth and computing power of such systems must be scaled up to support large data transactions between computing cores without experiencing performance degradation due to their limited data transfer rates. To meet such high bandwidth demand for highperformance computing systems, the PCIe standard is being developed up to 64 Gbps for the next generation, and data-rate of NVlink specializing in GPU communication reaches 50 Gbps (Temuc ¸in et al., 2021) . Data-rate of the ethernet protocol is also being developed up to 112 Gbps to handle the high network load. Although demands for higher data-rate for wireline communication keep increasing, limited bandwidth of wireline channels poses problems in data transmission. Different from wireless communication, wireline channels are time-invariant. In addition, pursuing low latency and good I/O energy efficiency, wireline communication has relied on simple modulation like PAM2 and simple equalizers, followed by symbol-by-symbol detection. However, data-rate is increasing so rapidly even a short channel causes severe signal distortion, making it difficult to restore data at the receiver. To increase the data-rate further, recently, wireline communication started adopting multi-level signaling like PAM4 and DSP-based equalizers along with analog-to-digital converters (ADCs) on the receive side. Although PAM4 signaling enables data-rate to reach over 100 Gbps, as (Cordova et al., 2021; de Abreu Farias Neto et al., 2020; Krupnik et al., 2020) , due to the peak power constraint, PAM4 degrades SNR and makes the signal more vulnerable to inter-symbol interference (ISI) caused by limited channel bandwidth, resulting in bit-error-rate (BER) degradation. Under these circumstances, equalizers to compensate for the channel loss play a critical role in high-speed wireline communication. Equalizers can be primarily divided into a linear equalizer, e.g., feed-forward equalizer (FFE), and a nonlinear equalizer, e.g., decision-feedback equalizers (DFE). FFE is a discrete-time finite-impulseresponse (FIR) filter that boosts the input in the frequency range where channel loss is high. It is simple to implement, but since incoming noise is also amplified, symbol detection after FFE shows limited BER performance. On the other hand, DFE does not boost noise and shows better BER, but the timing constraint of the feedback loop makes it difficult to design at a high speed.

