VSFG Value State Flow Graph - Zaidi

Imperative code hides too much parallelism. Static analysis is overly conservative on RaW and name alias avoidance by a factor of 10 or more.

Dark Silicon means having a lot of largely passive logic 'is a good idea'.

Current aim: Use a dataflow internal representation in compiler tools.

Final aim: Lets design a reconfigurable array that can directly execute dataflow programs.

Example
 
   for ( i = 0 ; i < 100; i ++ ) 
    {
     if (A[ i ] > 0 ) foo();
    }
   bar();

Figure 1. Example C Code.

  
»Exposing ILP in Custom Hardware with
a Dataflow Compiler IR, Zaidi+Greaves|




54: (C) 2008-18, DJ Greaves, University of Cambridge, Computer Laboratory.