| TDO | Test data out |
| TDI | Test data in |
| TMS | Test mode select |
| TCLK | Test clock |
| TRESET | Test reset |
IO pads are large and so the overhead of boundary scan circuitry inserted into each is low. Five special pins form the JTAG boundary scan access port.
A shift register with one bit per pad is created, chaining through each pad. The start and end of the chain is brought out as TDI and TDO. Test vectors may be shifted in and out.
| TDO | Test data out |
| TDI | Test data in |
| TMS | Test mode select |
| TCLK | Test clock |
| TRESET | Test reset |